commit 559987fc01f16f010681fedff69ffe8fb2231d50
author Mika Kuoppala <mika.kuoppala@intel.com> Tue Mar 24 13:03:26 2015 +0200
committer Mika Kuoppala <mika.kuoppala@intel.com> Thu Mar 26 10:00:34 2015 +0200
tree 1eb44b23f3b8540844ceaa2c3172c353eb0f88b1
parent f96bfb8e8c62b7e3f6340579fec5be6bb6d50b8e

tools/intel_error_decode: Add gen8+ fault data encodings

These two registers contains the 48bit fault address.

Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>

tools/intel_error_decode.c

diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
index 5fccefa..c710212 100644
--- a/tools/intel_error_decode.c
+++ b/tools/intel_error_decode.c
@@ -418,6 +418,19 @@
 	printf("    Source ID %d\n", reg >> 3 & 0xff);
 }
 
+static void
+print_fault_data(unsigned devid, uint32_t data1, uint32_t data0)
+{
+	uint64_t address;
+
+	if (intel_gen(devid) < 8)
+		return;
+
+	address = ((uint64_t)(data0) << 12) | ((uint64_t)data1 & 0xf) << 44;
+	printf("    Address 0x%016" PRIx64 " %s\n", address,
+	       data1 & (1 << 4) ? "GGTT" : "PPGTT");
+}
+
 #define MAX_RINGS 10 /* I really hope this never... */
 uint32_t head[MAX_RINGS];
 int head_ndx = 0;
@@ -499,7 +512,7 @@
 
 		matched = sscanf(line, "%08x : %08x", &offset, &value);
 		if (matched != 2) {
-			unsigned int reg;
+			unsigned int reg, reg2;
 
 			/* display reg section is after the ringbuffers, don't mix them */
 			decode(decode_ctx, is_batch, ring_name, gtt_offset,
@@ -562,6 +575,10 @@
 			if (matched == 1 && reg)
 				print_fault_reg(devid, reg);
 
+			matched = sscanf(line, "  FAULT_TLB_DATA: 0x%08x 0x%08x\n", &reg, &reg2);
+			if (matched == 2)
+				print_fault_data(devid, reg, reg2);
+
 			continue;
 		}