commit 7ee9f16e5166a4b0dddb76ad5166410c388f603e
author Daniel Vetter <daniel.vetter@ffwll.ch> Mon Jan 09 23:38:17 2012 +0100
committer Daniel Vetter <daniel.vetter@ffwll.ch> Mon Jan 09 23:38:17 2012 +0100
tree afa9477526494ff6097e2af643b84707396d6df4
parent 555cfd4597bc04cb3fa67304408f7fa1be910647

tools/intel_error_decode: convert over to libdrm decoder

Note that a per-ring error decode state would make more sense - this
way we could better decode the ring head and tail. But our current
head tracking is already lame (we need the kernel to also dump the
ringbuffer head/tail first, not just acthd), so I didn't bother.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

tools/intel_error_decode.c

diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
index 6ffaefe..a5c05d7 100644
--- a/tools/intel_error_decode.c
+++ b/tools/intel_error_decode.c
@@ -49,8 +49,8 @@
 #include <errno.h>
 #include <sys/stat.h>
 #include <err.h>
+#include <intel_bufmgr.h>
 
-#include "intel_decode.h"
 #include "intel_chipset.h"
 #include "intel_gpu_tools.h"
 #include "instdone.h"
@@ -276,7 +276,8 @@
 static void
 read_data_file (FILE *file)
 {
-    int devid = PCI_CHIP_I855_GM;
+    struct drm_intel_decode *decode_ctx = NULL;
+    uint32_t devid = PCI_CHIP_I855_GM;
     uint32_t *data = NULL;
     long long unsigned fence;
     int data_size = 0, count = 0, line_number = 0, matched;
@@ -306,7 +307,10 @@
 				       buffer_type[is_batch],
 				       ring_name,
 				       gtt_offset);
-				intel_decode (data, count, gtt_offset, devid, 0);
+				drm_intel_decode_set_batch_pointer(decode_ctx,
+								   data, gtt_offset,
+								   count);
+				drm_intel_decode(decode_ctx);
 				count = 0;
 			}
 			gtt_offset = new_gtt_offset;
@@ -324,7 +328,10 @@
 				       buffer_type[is_batch],
 				       ring_name,
 				       gtt_offset);
-				intel_decode (data, count, gtt_offset, devid, 0);
+				drm_intel_decode_set_batch_pointer(decode_ctx,
+								   data, gtt_offset,
+								   count);
+				drm_intel_decode(decode_ctx);
 				count = 0;
 			}
 			gtt_offset = new_gtt_offset;
@@ -345,7 +352,10 @@
 			   buffer_type[is_batch],
 			   ring_name,
 			   gtt_offset);
-		    intel_decode (data, count, gtt_offset, devid, 0);
+		    drm_intel_decode_set_batch_pointer(decode_ctx,
+						       data, gtt_offset,
+						       count);
+		    drm_intel_decode(decode_ctx);
 		    count = 0;
 	    }
 
@@ -356,11 +366,13 @@
 		    devid = reg;
 		    printf("Detected GEN%i chipset\n",
 			   intel_gen(devid));
+
+		    decode_ctx = drm_intel_decode_context_alloc(devid);
 	    }
 
 	    matched = sscanf (line, "  ACTHD: 0x%08x\n", &reg);
 	    if (matched == 1)
-		    intel_decode_context_set_head_tail(reg, 0xffffffff);
+		    drm_intel_decode_set_head_tail(decode_ctx, reg, 0xffffffff);
 
 	    matched = sscanf (line, "  PGTBL_ER: 0x%08x\n", &reg);
 	    if (matched == 1 && reg)
@@ -400,7 +412,10 @@
 	       buffer_type[is_batch],
 	       ring_name,
 	       gtt_offset);
-	intel_decode (data, count, gtt_offset, devid, 0);
+	drm_intel_decode_set_batch_pointer(decode_ctx,
+					   data, gtt_offset,
+					   count);
+	drm_intel_decode(decode_ctx);
     }
 
     free (data);