Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 1 | #ifndef INTEL_BATCHBUFFER_H |
| 2 | #define INTEL_BATCHBUFFER_H |
| 3 | |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 4 | #include <stdint.h> |
Daniel Vetter | 924115b | 2014-03-22 20:18:51 +0100 | [diff] [blame] | 5 | #include <intel_bufmgr.h> |
Daniel Vetter | 0e22f14 | 2014-03-22 19:27:04 +0100 | [diff] [blame] | 6 | #include "igt_core.h" |
Daniel Vetter | 6cfcd71 | 2014-03-22 20:07:35 +0100 | [diff] [blame] | 7 | #include "intel_reg.h" |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 8 | |
| 9 | #define BATCH_SZ 4096 |
| 10 | #define BATCH_RESERVED 16 |
| 11 | |
Chris Wilson | 719ffef | 2011-05-22 10:34:12 +0100 | [diff] [blame] | 12 | struct intel_batchbuffer { |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 13 | drm_intel_bufmgr *bufmgr; |
Chris Wilson | d4d769a | 2010-10-26 10:59:18 +0100 | [diff] [blame] | 14 | uint32_t devid; |
Chris Wilson | 23d961e | 2014-08-29 14:49:59 +0100 | [diff] [blame] | 15 | int gen; |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 16 | |
| 17 | drm_intel_bo *bo; |
| 18 | |
Chris Wilson | 371f87f | 2011-02-01 10:53:57 +0000 | [diff] [blame] | 19 | uint8_t buffer[BATCH_SZ]; |
Chris Wilson | 982f7eb | 2014-08-29 15:19:57 +0100 | [diff] [blame] | 20 | uint8_t *ptr, *end; |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 21 | uint8_t *state; |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 22 | }; |
| 23 | |
Chris Wilson | d4d769a | 2010-10-26 10:59:18 +0100 | [diff] [blame] | 24 | struct intel_batchbuffer *intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr, |
| 25 | uint32_t devid); |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 26 | |
| 27 | void intel_batchbuffer_free(struct intel_batchbuffer *batch); |
| 28 | |
| 29 | |
| 30 | void intel_batchbuffer_flush(struct intel_batchbuffer *batch); |
Daniel Vetter | d42b7f9 | 2011-09-07 09:20:36 +0200 | [diff] [blame] | 31 | void intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring); |
Ben Widawsky | a635a5a | 2012-01-15 14:52:33 -0800 | [diff] [blame] | 32 | void intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch, |
| 33 | drm_intel_context *context); |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 34 | |
| 35 | void intel_batchbuffer_reset(struct intel_batchbuffer *batch); |
| 36 | |
| 37 | void intel_batchbuffer_data(struct intel_batchbuffer *batch, |
| 38 | const void *data, unsigned int bytes); |
| 39 | |
| 40 | void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch, |
| 41 | drm_intel_bo *buffer, |
Chris Wilson | 982f7eb | 2014-08-29 15:19:57 +0100 | [diff] [blame] | 42 | uint64_t delta, |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 43 | uint32_t read_domains, |
Daniel Vetter | 8ab88c9 | 2011-03-27 16:17:54 +0200 | [diff] [blame] | 44 | uint32_t write_domain, |
| 45 | int fenced); |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 46 | |
| 47 | /* Inline functions - might actually be better off with these |
| 48 | * non-inlined. Certainly better off switching all command packets to |
| 49 | * be passed as structs rather than dwords, but that's a little bit of |
| 50 | * work... |
| 51 | */ |
Ben Widawsky | 802bd74 | 2012-01-15 13:41:42 -0800 | [diff] [blame] | 52 | #pragma GCC diagnostic ignored "-Winline" |
Oscar Mateo | 5032e7b | 2013-11-12 11:50:42 +0000 | [diff] [blame] | 53 | static inline unsigned int |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 54 | intel_batchbuffer_space(struct intel_batchbuffer *batch) |
| 55 | { |
Chris Wilson | 371f87f | 2011-02-01 10:53:57 +0000 | [diff] [blame] | 56 | return (BATCH_SZ - BATCH_RESERVED) - (batch->ptr - batch->buffer); |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 57 | } |
| 58 | |
| 59 | |
| 60 | static inline void |
| 61 | intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, uint32_t dword) |
| 62 | { |
Daniel Vetter | 0e22f14 | 2014-03-22 19:27:04 +0100 | [diff] [blame] | 63 | igt_assert(intel_batchbuffer_space(batch) >= 4); |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 64 | *(uint32_t *) (batch->ptr) = dword; |
| 65 | batch->ptr += 4; |
| 66 | } |
| 67 | |
| 68 | static inline void |
| 69 | intel_batchbuffer_require_space(struct intel_batchbuffer *batch, |
| 70 | unsigned int sz) |
| 71 | { |
Daniel Vetter | 0e22f14 | 2014-03-22 19:27:04 +0100 | [diff] [blame] | 72 | igt_assert(sz < BATCH_SZ - BATCH_RESERVED); |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 73 | if (intel_batchbuffer_space(batch) < sz) |
| 74 | intel_batchbuffer_flush(batch); |
| 75 | } |
| 76 | |
Daniel Vetter | ec5f9e8 | 2014-03-13 01:13:28 +0100 | [diff] [blame] | 77 | /** |
| 78 | * BEGIN_BATCH: |
| 79 | * @n: number of DWORDS to emit |
Chris Wilson | 10552b5 | 2014-08-30 11:44:51 +0100 | [diff] [blame] | 80 | * @r: number of RELOCS to emit |
Daniel Vetter | ec5f9e8 | 2014-03-13 01:13:28 +0100 | [diff] [blame] | 81 | * |
| 82 | * Prepares a batch to emit @n DWORDS, flushing it if there's not enough space |
| 83 | * available. |
| 84 | * |
| 85 | * This macro needs a pointer to an #intel_batchbuffer structure called batch in |
| 86 | * scope. |
| 87 | */ |
Chris Wilson | 10552b5 | 2014-08-30 11:44:51 +0100 | [diff] [blame] | 88 | #define BEGIN_BATCH(n, r) do { \ |
| 89 | int __n = (n); \ |
Chris Wilson | 982f7eb | 2014-08-29 15:19:57 +0100 | [diff] [blame] | 90 | igt_assert(batch->end == NULL); \ |
Chris Wilson | 10552b5 | 2014-08-30 11:44:51 +0100 | [diff] [blame] | 91 | if (batch->gen >= 8) __n += r; \ |
| 92 | __n *= 4; \ |
| 93 | intel_batchbuffer_require_space(batch, __n); \ |
| 94 | batch->end = batch->ptr + __n; \ |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 95 | } while (0) |
| 96 | |
Daniel Vetter | ec5f9e8 | 2014-03-13 01:13:28 +0100 | [diff] [blame] | 97 | /** |
| 98 | * OUT_BATCH: |
| 99 | * @d: DWORD to emit |
| 100 | * |
| 101 | * Emits @d into a batch. |
| 102 | * |
| 103 | * This macro needs a pointer to an #intel_batchbuffer structure called batch in |
| 104 | * scope. |
| 105 | */ |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 106 | #define OUT_BATCH(d) intel_batchbuffer_emit_dword(batch, d) |
| 107 | |
Daniel Vetter | ec5f9e8 | 2014-03-13 01:13:28 +0100 | [diff] [blame] | 108 | /** |
| 109 | * OUT_RELOC_FENCED: |
| 110 | * @buf: relocation target libdrm buffer object |
| 111 | * @read_domains: gem domain bits for the relocation |
| 112 | * @write_domain: gem domain bit for the relocation |
| 113 | * @delta: delta value to add to @buffer's gpu address |
| 114 | * |
| 115 | * Emits a fenced relocation into a batch. |
| 116 | * |
| 117 | * This macro needs a pointer to an #intel_batchbuffer structure called batch in |
| 118 | * scope. |
| 119 | */ |
Daniel Vetter | 8ab88c9 | 2011-03-27 16:17:54 +0200 | [diff] [blame] | 120 | #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ |
Daniel Vetter | 0e22f14 | 2014-03-22 19:27:04 +0100 | [diff] [blame] | 121 | igt_assert((delta) >= 0); \ |
Daniel Vetter | 8ab88c9 | 2011-03-27 16:17:54 +0200 | [diff] [blame] | 122 | intel_batchbuffer_emit_reloc(batch, buf, delta, \ |
| 123 | read_domains, write_domain, 1); \ |
| 124 | } while (0) |
| 125 | |
Daniel Vetter | ec5f9e8 | 2014-03-13 01:13:28 +0100 | [diff] [blame] | 126 | /** |
Mika Kuoppala | db25973 | 2014-03-26 17:24:43 +0200 | [diff] [blame] | 127 | * OUT_RELOC: |
Daniel Vetter | ec5f9e8 | 2014-03-13 01:13:28 +0100 | [diff] [blame] | 128 | * @buf: relocation target libdrm buffer object |
| 129 | * @read_domains: gem domain bits for the relocation |
| 130 | * @write_domain: gem domain bit for the relocation |
| 131 | * @delta: delta value to add to @buffer's gpu address |
| 132 | * |
| 133 | * Emits a normal, unfenced relocation into a batch. |
| 134 | * |
| 135 | * This macro needs a pointer to an #intel_batchbuffer structure called batch in |
| 136 | * scope. |
| 137 | */ |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 138 | #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ |
Daniel Vetter | 0e22f14 | 2014-03-22 19:27:04 +0100 | [diff] [blame] | 139 | igt_assert((delta) >= 0); \ |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 140 | intel_batchbuffer_emit_reloc(batch, buf, delta, \ |
Daniel Vetter | 8ab88c9 | 2011-03-27 16:17:54 +0200 | [diff] [blame] | 141 | read_domains, write_domain, 0); \ |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 142 | } while (0) |
| 143 | |
Daniel Vetter | ec5f9e8 | 2014-03-13 01:13:28 +0100 | [diff] [blame] | 144 | /** |
| 145 | * ADVANCE_BATCH: |
| 146 | * |
| 147 | * Completes the batch command emission sequence started with #BEGIN_BATCH. |
| 148 | * |
| 149 | * This macro needs a pointer to an #intel_batchbuffer structure called batch in |
| 150 | * scope. |
| 151 | */ |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 152 | #define ADVANCE_BATCH() do { \ |
Chris Wilson | 982f7eb | 2014-08-29 15:19:57 +0100 | [diff] [blame] | 153 | igt_assert(batch->ptr == batch->end); \ |
| 154 | batch->end = NULL; \ |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 155 | } while(0) |
| 156 | |
Chris Wilson | 10552b5 | 2014-08-30 11:44:51 +0100 | [diff] [blame] | 157 | #define BLIT_COPY_BATCH_START(flags) do { \ |
| 158 | BEGIN_BATCH(8, 2); \ |
| 159 | OUT_BATCH(XY_SRC_COPY_BLT_CMD | \ |
| 160 | XY_SRC_COPY_BLT_WRITE_ALPHA | \ |
| 161 | XY_SRC_COPY_BLT_WRITE_RGB | \ |
| 162 | (flags) | \ |
Chris Wilson | d6af004 | 2014-08-30 14:48:36 +0100 | [diff] [blame^] | 163 | (6 + 2*(batch->gen >= 8))); \ |
Ben Widawsky | f4dfa37 | 2013-10-08 15:02:07 -0700 | [diff] [blame] | 164 | } while(0) |
| 165 | |
Chris Wilson | 10552b5 | 2014-08-30 11:44:51 +0100 | [diff] [blame] | 166 | #define COLOR_BLIT_COPY_BATCH_START(flags) do { \ |
| 167 | BEGIN_BATCH(6, 1); \ |
| 168 | OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | \ |
| 169 | COLOR_BLT_WRITE_ALPHA | \ |
| 170 | XY_COLOR_BLT_WRITE_RGB | \ |
| 171 | (4 + (batch->gen >= 8))); \ |
Ben Widawsky | 672911d | 2013-12-05 14:14:35 -0800 | [diff] [blame] | 172 | } while(0) |
| 173 | |
Imre Deak | c1ee0bb | 2013-07-29 16:43:31 +0300 | [diff] [blame] | 174 | void |
| 175 | intel_blt_copy(struct intel_batchbuffer *batch, |
| 176 | drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch, |
| 177 | drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch, |
| 178 | int width, int height, int bpp); |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 179 | void intel_copy_bo(struct intel_batchbuffer *batch, |
| 180 | drm_intel_bo *dst_bo, drm_intel_bo *src_bo, |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 181 | long int size); |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 182 | |
Daniel Vetter | 7754c4d | 2014-03-22 18:16:30 +0100 | [diff] [blame] | 183 | /** |
| 184 | * igt_buf: |
| 185 | * @bo: underlying libdrm buffer object |
| 186 | * @stride: stride of the buffer |
| 187 | * @tiling: tiling mode bits |
| 188 | * @data: pointer to the memory mapping of the buffer |
| 189 | * @size: size of the buffer object |
Daniel Vetter | 7754c4d | 2014-03-22 18:16:30 +0100 | [diff] [blame] | 190 | * |
| 191 | * This is a i-g-t buffer object wrapper structure which augments the baseline |
| 192 | * libdrm buffer object with suitable data needed by the render copy and the |
| 193 | * media fill functions. |
Daniel Vetter | 7754c4d | 2014-03-22 18:16:30 +0100 | [diff] [blame] | 194 | */ |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 195 | struct igt_buf { |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 196 | drm_intel_bo *bo; |
| 197 | uint32_t stride; |
| 198 | uint32_t tiling; |
| 199 | uint32_t *data; |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 200 | uint32_t size; |
Thomas Wood | 52a3a2e | 2014-06-09 17:23:21 +0100 | [diff] [blame] | 201 | /*< private >*/ |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 202 | unsigned num_tiles; |
| 203 | }; |
| 204 | |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 205 | unsigned igt_buf_width(struct igt_buf *buf); |
| 206 | unsigned igt_buf_height(struct igt_buf *buf); |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 207 | |
Daniel Vetter | 7754c4d | 2014-03-22 18:16:30 +0100 | [diff] [blame] | 208 | /** |
| 209 | * igt_render_copyfunc_t: |
| 210 | * @batch: batchbuffer object |
| 211 | * @context: libdrm hardware context to use |
| 212 | * @src: source i-g-t buffer object |
| 213 | * @src_x: source pixel x-coordination |
| 214 | * @src_y: source pixel y-coordination |
| 215 | * @width: width of the copied rectangle |
| 216 | * @height: height of the copied rectangle |
| 217 | * @dst: destination i-g-t buffer object |
| 218 | * @dst_x: destination pixel x-coordination |
| 219 | * @dst_y: destination pixel y-coordination |
| 220 | * |
| 221 | * This is the type of the per-platform render copy functions. The |
| 222 | * platform-specific implementation can be obtained by calling |
| 223 | * igt_get_render_copyfunc(). |
| 224 | * |
| 225 | * A render copy function will emit a batchbuffer to the kernel which executes |
| 226 | * the specified blit copy operation using the render engine. @context is |
| 227 | * optional and can be NULL. |
| 228 | */ |
Daniel Vetter | 53a4d9e | 2014-03-22 15:49:02 +0100 | [diff] [blame] | 229 | typedef void (*igt_render_copyfunc_t)(struct intel_batchbuffer *batch, |
| 230 | drm_intel_context *context, |
| 231 | struct igt_buf *src, unsigned src_x, unsigned src_y, |
| 232 | unsigned width, unsigned height, |
| 233 | struct igt_buf *dst, unsigned dst_x, unsigned dst_y); |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 234 | |
Daniel Vetter | 53a4d9e | 2014-03-22 15:49:02 +0100 | [diff] [blame] | 235 | igt_render_copyfunc_t igt_get_render_copyfunc(int devid); |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 236 | |
Daniel Vetter | 7754c4d | 2014-03-22 18:16:30 +0100 | [diff] [blame] | 237 | /** |
| 238 | * igt_media_fillfunc_t: |
| 239 | * @batch: batchbuffer object |
| 240 | * @dst: destination i-g-t buffer object |
| 241 | * @x: destination pixel x-coordination |
| 242 | * @y: destination pixel y-coordination |
| 243 | * @width: width of the filled rectangle |
| 244 | * @height: height of the filled rectangle |
| 245 | * @color: fill color to use |
| 246 | * |
| 247 | * This is the type of the per-platform media fill functions. The |
| 248 | * platform-specific implementation can be obtained by calling |
| 249 | * igt_get_media_fillfunc(). |
| 250 | * |
| 251 | * A media fill function will emit a batchbuffer to the kernel which executes |
| 252 | * the specified blit fill operation using the media engine. |
| 253 | */ |
Daniel Vetter | 53a4d9e | 2014-03-22 15:49:02 +0100 | [diff] [blame] | 254 | typedef void (*igt_media_fillfunc_t)(struct intel_batchbuffer *batch, |
| 255 | struct igt_buf *dst, |
| 256 | unsigned x, unsigned y, |
| 257 | unsigned width, unsigned height, |
| 258 | uint8_t color); |
Daniel Vetter | aaebbc5 | 2014-03-22 15:35:16 +0100 | [diff] [blame] | 259 | |
Daniel Vetter | 53a4d9e | 2014-03-22 15:49:02 +0100 | [diff] [blame] | 260 | igt_media_fillfunc_t igt_get_media_fillfunc(int devid); |
Daniel Vetter | aaebbc5 | 2014-03-22 15:35:16 +0100 | [diff] [blame] | 261 | |
Eric Anholt | 8c64183 | 2009-03-26 17:15:11 -0700 | [diff] [blame] | 262 | #endif |