| Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 1 | #ifndef GEN8_MEDIA_H |
| 2 | #define GEN8_MEDIA_H |
| 3 | |
| Daniel Vetter | 6cfcd71 | 2014-03-22 20:07:35 +0100 | [diff] [blame] | 4 | #include <stdint.h> |
| 5 | |
| Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 6 | #define GEN8_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 |
| 7 | #define GEN8_SURFACEFORMAT_R32G32B32A32_SINT 0x001 |
| 8 | #define GEN8_SURFACEFORMAT_R32G32B32A32_UINT 0x002 |
| 9 | #define GEN8_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 |
| 10 | #define GEN8_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 |
| 11 | #define GEN8_SURFACEFORMAT_R64G64_FLOAT 0x005 |
| 12 | #define GEN8_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 |
| 13 | #define GEN8_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 |
| 14 | #define GEN8_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 |
| 15 | #define GEN8_SURFACEFORMAT_R32G32B32_FLOAT 0x040 |
| 16 | #define GEN8_SURFACEFORMAT_R32G32B32_SINT 0x041 |
| 17 | #define GEN8_SURFACEFORMAT_R32G32B32_UINT 0x042 |
| 18 | #define GEN8_SURFACEFORMAT_R32G32B32_UNORM 0x043 |
| 19 | #define GEN8_SURFACEFORMAT_R32G32B32_SNORM 0x044 |
| 20 | #define GEN8_SURFACEFORMAT_R32G32B32_SSCALED 0x045 |
| 21 | #define GEN8_SURFACEFORMAT_R32G32B32_USCALED 0x046 |
| 22 | #define GEN8_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 |
| 23 | #define GEN8_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 |
| 24 | #define GEN8_SURFACEFORMAT_R16G16B16A16_SINT 0x082 |
| 25 | #define GEN8_SURFACEFORMAT_R16G16B16A16_UINT 0x083 |
| 26 | #define GEN8_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 |
| 27 | #define GEN8_SURFACEFORMAT_R32G32_FLOAT 0x085 |
| 28 | #define GEN8_SURFACEFORMAT_R32G32_SINT 0x086 |
| 29 | #define GEN8_SURFACEFORMAT_R32G32_UINT 0x087 |
| 30 | #define GEN8_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 |
| 31 | #define GEN8_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 |
| 32 | #define GEN8_SURFACEFORMAT_L32A32_FLOAT 0x08A |
| 33 | #define GEN8_SURFACEFORMAT_R32G32_UNORM 0x08B |
| 34 | #define GEN8_SURFACEFORMAT_R32G32_SNORM 0x08C |
| 35 | #define GEN8_SURFACEFORMAT_R64_FLOAT 0x08D |
| 36 | #define GEN8_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E |
| 37 | #define GEN8_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F |
| 38 | #define GEN8_SURFACEFORMAT_A32X32_FLOAT 0x090 |
| 39 | #define GEN8_SURFACEFORMAT_L32X32_FLOAT 0x091 |
| 40 | #define GEN8_SURFACEFORMAT_I32X32_FLOAT 0x092 |
| 41 | #define GEN8_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 |
| 42 | #define GEN8_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 |
| 43 | #define GEN8_SURFACEFORMAT_R32G32_SSCALED 0x095 |
| 44 | #define GEN8_SURFACEFORMAT_R32G32_USCALED 0x096 |
| 45 | #define GEN8_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 |
| 46 | #define GEN8_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 |
| 47 | #define GEN8_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 |
| 48 | #define GEN8_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 |
| 49 | #define GEN8_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 |
| 50 | #define GEN8_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 |
| 51 | #define GEN8_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 |
| 52 | #define GEN8_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 |
| 53 | #define GEN8_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 |
| 54 | #define GEN8_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA |
| 55 | #define GEN8_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB |
| 56 | #define GEN8_SURFACEFORMAT_R16G16_UNORM 0x0CC |
| 57 | #define GEN8_SURFACEFORMAT_R16G16_SNORM 0x0CD |
| 58 | #define GEN8_SURFACEFORMAT_R16G16_SINT 0x0CE |
| 59 | #define GEN8_SURFACEFORMAT_R16G16_UINT 0x0CF |
| 60 | #define GEN8_SURFACEFORMAT_R16G16_FLOAT 0x0D0 |
| 61 | #define GEN8_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 |
| 62 | #define GEN8_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 |
| 63 | #define GEN8_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 |
| 64 | #define GEN8_SURFACEFORMAT_R32_SINT 0x0D6 |
| 65 | #define GEN8_SURFACEFORMAT_R32_UINT 0x0D7 |
| 66 | #define GEN8_SURFACEFORMAT_R32_FLOAT 0x0D8 |
| 67 | #define GEN8_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 |
| 68 | #define GEN8_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA |
| 69 | #define GEN8_SURFACEFORMAT_L16A16_UNORM 0x0DF |
| 70 | #define GEN8_SURFACEFORMAT_I24X8_UNORM 0x0E0 |
| 71 | #define GEN8_SURFACEFORMAT_L24X8_UNORM 0x0E1 |
| 72 | #define GEN8_SURFACEFORMAT_A24X8_UNORM 0x0E2 |
| 73 | #define GEN8_SURFACEFORMAT_I32_FLOAT 0x0E3 |
| 74 | #define GEN8_SURFACEFORMAT_L32_FLOAT 0x0E4 |
| 75 | #define GEN8_SURFACEFORMAT_A32_FLOAT 0x0E5 |
| 76 | #define GEN8_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 |
| 77 | #define GEN8_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA |
| 78 | #define GEN8_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB |
| 79 | #define GEN8_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC |
| 80 | #define GEN8_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED |
| 81 | #define GEN8_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE |
| 82 | #define GEN8_SURFACEFORMAT_L16A16_FLOAT 0x0F0 |
| 83 | #define GEN8_SURFACEFORMAT_R32_UNORM 0x0F1 |
| 84 | #define GEN8_SURFACEFORMAT_R32_SNORM 0x0F2 |
| 85 | #define GEN8_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 |
| 86 | #define GEN8_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 |
| 87 | #define GEN8_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 |
| 88 | #define GEN8_SURFACEFORMAT_R16G16_SSCALED 0x0F6 |
| 89 | #define GEN8_SURFACEFORMAT_R16G16_USCALED 0x0F7 |
| 90 | #define GEN8_SURFACEFORMAT_R32_SSCALED 0x0F8 |
| 91 | #define GEN8_SURFACEFORMAT_R32_USCALED 0x0F9 |
| 92 | #define GEN8_SURFACEFORMAT_B5G6R5_UNORM 0x100 |
| 93 | #define GEN8_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 |
| 94 | #define GEN8_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 |
| 95 | #define GEN8_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 |
| 96 | #define GEN8_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 |
| 97 | #define GEN8_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 |
| 98 | #define GEN8_SURFACEFORMAT_R8G8_UNORM 0x106 |
| 99 | #define GEN8_SURFACEFORMAT_R8G8_SNORM 0x107 |
| 100 | #define GEN8_SURFACEFORMAT_R8G8_SINT 0x108 |
| 101 | #define GEN8_SURFACEFORMAT_R8G8_UINT 0x109 |
| 102 | #define GEN8_SURFACEFORMAT_R16_UNORM 0x10A |
| 103 | #define GEN8_SURFACEFORMAT_R16_SNORM 0x10B |
| 104 | #define GEN8_SURFACEFORMAT_R16_SINT 0x10C |
| 105 | #define GEN8_SURFACEFORMAT_R16_UINT 0x10D |
| 106 | #define GEN8_SURFACEFORMAT_R16_FLOAT 0x10E |
| 107 | #define GEN8_SURFACEFORMAT_I16_UNORM 0x111 |
| 108 | #define GEN8_SURFACEFORMAT_L16_UNORM 0x112 |
| 109 | #define GEN8_SURFACEFORMAT_A16_UNORM 0x113 |
| 110 | #define GEN8_SURFACEFORMAT_L8A8_UNORM 0x114 |
| 111 | #define GEN8_SURFACEFORMAT_I16_FLOAT 0x115 |
| 112 | #define GEN8_SURFACEFORMAT_L16_FLOAT 0x116 |
| 113 | #define GEN8_SURFACEFORMAT_A16_FLOAT 0x117 |
| 114 | #define GEN8_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 |
| 115 | #define GEN8_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A |
| 116 | #define GEN8_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B |
| 117 | #define GEN8_SURFACEFORMAT_R8G8_SSCALED 0x11C |
| 118 | #define GEN8_SURFACEFORMAT_R8G8_USCALED 0x11D |
| 119 | #define GEN8_SURFACEFORMAT_R16_SSCALED 0x11E |
| 120 | #define GEN8_SURFACEFORMAT_R16_USCALED 0x11F |
| 121 | #define GEN8_SURFACEFORMAT_R8_UNORM 0x140 |
| 122 | #define GEN8_SURFACEFORMAT_R8_SNORM 0x141 |
| 123 | #define GEN8_SURFACEFORMAT_R8_SINT 0x142 |
| 124 | #define GEN8_SURFACEFORMAT_R8_UINT 0x143 |
| 125 | #define GEN8_SURFACEFORMAT_A8_UNORM 0x144 |
| 126 | #define GEN8_SURFACEFORMAT_I8_UNORM 0x145 |
| 127 | #define GEN8_SURFACEFORMAT_L8_UNORM 0x146 |
| 128 | #define GEN8_SURFACEFORMAT_P4A4_UNORM 0x147 |
| 129 | #define GEN8_SURFACEFORMAT_A4P4_UNORM 0x148 |
| 130 | #define GEN8_SURFACEFORMAT_R8_SSCALED 0x149 |
| 131 | #define GEN8_SURFACEFORMAT_R8_USCALED 0x14A |
| 132 | #define GEN8_SURFACEFORMAT_R1_UINT 0x181 |
| 133 | #define GEN8_SURFACEFORMAT_YCRCB_NORMAL 0x182 |
| 134 | #define GEN8_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 |
| 135 | #define GEN8_SURFACEFORMAT_BC1_UNORM 0x186 |
| 136 | #define GEN8_SURFACEFORMAT_BC2_UNORM 0x187 |
| 137 | #define GEN8_SURFACEFORMAT_BC3_UNORM 0x188 |
| 138 | #define GEN8_SURFACEFORMAT_BC4_UNORM 0x189 |
| 139 | #define GEN8_SURFACEFORMAT_BC5_UNORM 0x18A |
| 140 | #define GEN8_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B |
| 141 | #define GEN8_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C |
| 142 | #define GEN8_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D |
| 143 | #define GEN8_SURFACEFORMAT_MONO8 0x18E |
| 144 | #define GEN8_SURFACEFORMAT_YCRCB_SWAPUV 0x18F |
| 145 | #define GEN8_SURFACEFORMAT_YCRCB_SWAPY 0x190 |
| 146 | #define GEN8_SURFACEFORMAT_DXT1_RGB 0x191 |
| 147 | #define GEN8_SURFACEFORMAT_FXT1 0x192 |
| 148 | #define GEN8_SURFACEFORMAT_R8G8B8_UNORM 0x193 |
| 149 | #define GEN8_SURFACEFORMAT_R8G8B8_SNORM 0x194 |
| 150 | #define GEN8_SURFACEFORMAT_R8G8B8_SSCALED 0x195 |
| 151 | #define GEN8_SURFACEFORMAT_R8G8B8_USCALED 0x196 |
| 152 | #define GEN8_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 |
| 153 | #define GEN8_SURFACEFORMAT_R64G64B64_FLOAT 0x198 |
| 154 | #define GEN8_SURFACEFORMAT_BC4_SNORM 0x199 |
| 155 | #define GEN8_SURFACEFORMAT_BC5_SNORM 0x19A |
| 156 | #define GEN8_SURFACEFORMAT_R16G16B16_UNORM 0x19C |
| 157 | #define GEN8_SURFACEFORMAT_R16G16B16_SNORM 0x19D |
| 158 | #define GEN8_SURFACEFORMAT_R16G16B16_SSCALED 0x19E |
| 159 | #define GEN8_SURFACEFORMAT_R16G16B16_USCALED 0x19F |
| 160 | |
| 161 | #define GEN8_SURFACERETURNFORMAT_FLOAT32 0 |
| 162 | #define GEN8_SURFACERETURNFORMAT_S1 1 |
| 163 | |
| 164 | #define GEN8_SURFACE_1D 0 |
| 165 | #define GEN8_SURFACE_2D 1 |
| 166 | #define GEN8_SURFACE_3D 2 |
| 167 | #define GEN8_SURFACE_CUBE 3 |
| 168 | #define GEN8_SURFACE_BUFFER 4 |
| 169 | #define GEN8_SURFACE_NULL 7 |
| 170 | |
| 171 | #define GEN8_FLOATING_POINT_IEEE_754 0 |
| 172 | #define GEN8_FLOATING_POINT_NON_IEEE_754 1 |
| 173 | |
| 174 | #define GFXPIPE(Pipeline,Opcode,Subopcode) ((3 << 29) | \ |
| 175 | ((Pipeline) << 27) | \ |
| 176 | ((Opcode) << 24) | \ |
| 177 | ((Subopcode) << 16)) |
| 178 | |
| 179 | #define GEN8_PIPELINE_SELECT GFXPIPE(1, 1, 4) |
| 180 | # define PIPELINE_SELECT_3D (0 << 0) |
| 181 | # define PIPELINE_SELECT_MEDIA (1 << 0) |
| 182 | |
| 183 | #define GEN8_STATE_BASE_ADDRESS GFXPIPE(0, 1, 1) |
| 184 | # define BASE_ADDRESS_MODIFY (1 << 0) |
| 185 | |
| 186 | #define GEN8_MEDIA_VFE_STATE GFXPIPE(2, 0, 0) |
| 187 | #define GEN8_MEDIA_CURBE_LOAD GFXPIPE(2, 0, 1) |
| 188 | #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD GFXPIPE(2, 0, 2) |
| 189 | #define GEN8_MEDIA_STATE_FLUSH GFXPIPE(2, 0, 4) |
| 190 | #define GEN8_MEDIA_OBJECT GFXPIPE(2, 1, 0) |
| 191 | |
| 192 | struct gen8_interface_descriptor_data |
| 193 | { |
| 194 | struct { |
| 195 | uint32_t pad0:6; |
| 196 | uint32_t kernel_start_pointer:26; |
| 197 | } desc0; |
| 198 | |
| 199 | struct { |
| 200 | uint32_t kernel_start_pointer_high:16; |
| 201 | uint32_t pad0:16; |
| 202 | } desc1; |
| 203 | |
| 204 | struct { |
| 205 | uint32_t pad0:7; |
| 206 | uint32_t software_exception_enable:1; |
| 207 | uint32_t pad1:3; |
| 208 | uint32_t maskstack_exception_enable:1; |
| 209 | uint32_t pad2:1; |
| 210 | uint32_t illegal_opcode_exception_enable:1; |
| 211 | uint32_t pad3:2; |
| 212 | uint32_t floating_point_mode:1; |
| 213 | uint32_t thread_priority:1; |
| 214 | uint32_t single_program_flow:1; |
| 215 | uint32_t denorm_mode:1; |
| 216 | uint32_t pad4:12; |
| 217 | } desc2; |
| 218 | |
| 219 | struct { |
| 220 | uint32_t pad0:2; |
| 221 | uint32_t sampler_count:3; |
| 222 | uint32_t sampler_state_pointer:27; |
| 223 | } desc3; |
| 224 | |
| 225 | struct { |
| 226 | uint32_t binding_table_entry_count:5; |
| 227 | uint32_t binding_table_pointer:11; |
| 228 | uint32_t pad0: 16; |
| 229 | } desc4; |
| 230 | |
| 231 | struct { |
| 232 | uint32_t constant_urb_entry_read_offset:16; |
| 233 | uint32_t constant_urb_entry_read_length:16; |
| 234 | } desc5; |
| 235 | |
| 236 | struct { |
| 237 | uint32_t num_threads_in_tg:10; |
| 238 | uint32_t pad0:5; |
| 239 | uint32_t global_barrier_enable:1; |
| 240 | uint32_t shared_local_memory_size:5; |
| 241 | uint32_t barrier_enable:1; |
| 242 | uint32_t rounding_mode:2; |
| 243 | uint32_t pad1:8; |
| 244 | } desc6; |
| 245 | |
| 246 | struct { |
| 247 | uint32_t cross_thread_constant_data_read_length:8; |
| 248 | uint32_t pad0:24; |
| 249 | } desc7; |
| 250 | }; |
| 251 | |
| 252 | struct gen8_surface_state |
| 253 | { |
| 254 | struct { |
| 255 | uint32_t cube_pos_z:1; |
| 256 | uint32_t cube_neg_z:1; |
| 257 | uint32_t cube_pos_y:1; |
| 258 | uint32_t cube_neg_y:1; |
| 259 | uint32_t cube_pos_x:1; |
| 260 | uint32_t cube_neg_x:1; |
| 261 | uint32_t media_boundary_pixel_mode:2; |
| 262 | uint32_t render_cache_read_write:1; |
| 263 | uint32_t sampler_l2_bypass_disable:1; |
| 264 | uint32_t vert_line_stride_ofs:1; |
| 265 | uint32_t vert_line_stride:1; |
| 266 | uint32_t tiled_mode:2; |
| 267 | uint32_t horizontal_alignment:2; |
| 268 | uint32_t vertical_alignment:2; |
| 269 | uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */ |
| 270 | uint32_t pad0:1; |
| 271 | uint32_t is_array:1; |
| 272 | uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ |
| 273 | } ss0; |
| 274 | |
| 275 | struct { |
| 276 | uint32_t qpitch:15; |
| 277 | uint32_t pad1:4; |
| 278 | uint32_t base_mip_level:5; |
| 279 | uint32_t memory_object_control:7; |
| 280 | uint32_t pad0:1; |
| 281 | } ss1; |
| 282 | |
| 283 | struct { |
| 284 | uint32_t width:14; |
| 285 | uint32_t pad1:2; |
| 286 | uint32_t height:14; |
| 287 | uint32_t pad0:2; |
| 288 | } ss2; |
| 289 | |
| 290 | struct { |
| 291 | uint32_t pitch:18; |
| 292 | uint32_t pad:3; |
| 293 | uint32_t depth:11; |
| 294 | } ss3; |
| 295 | |
| 296 | struct { |
| 297 | uint32_t multisample_position_palette_index:3; |
| 298 | uint32_t num_multisamples:3; |
| 299 | uint32_t multisampled_surface_storage_format:1; |
| 300 | uint32_t render_target_view_extent:11; |
| 301 | uint32_t min_array_elt:11; |
| 302 | uint32_t rotation:2; |
| 303 | uint32_t force_ncmp_reduce_type:1; |
| 304 | } ss4; |
| 305 | |
| 306 | struct { |
| 307 | uint32_t mip_count:4; |
| 308 | uint32_t min_lod:4; |
| 309 | uint32_t pad3:6; |
| 310 | uint32_t coherency_type:1; |
| 311 | uint32_t pad2:5; |
| 312 | uint32_t ewa_disable_for_cube:1; |
| 313 | uint32_t y_offset:3; |
| 314 | uint32_t pad0:1; |
| 315 | uint32_t x_offset:7; |
| 316 | } ss5; |
| 317 | |
| 318 | struct { |
| 319 | uint32_t pad; /* Multisample Control Surface stuff */ |
| 320 | } ss6; |
| 321 | |
| 322 | struct { |
| 323 | uint32_t resource_min_lod:12; |
| 324 | |
| 325 | /* Only on Haswell */ |
| 326 | uint32_t pad0:4; |
| 327 | uint32_t shader_chanel_select_a:3; |
| 328 | uint32_t shader_chanel_select_b:3; |
| 329 | uint32_t shader_chanel_select_g:3; |
| 330 | uint32_t shader_chanel_select_r:3; |
| 331 | |
| 332 | uint32_t alpha_clear_color:1; |
| 333 | uint32_t blue_clear_color:1; |
| 334 | uint32_t green_clear_color:1; |
| 335 | uint32_t red_clear_color:1; |
| 336 | } ss7; |
| 337 | |
| 338 | struct { |
| 339 | uint32_t base_addr; |
| 340 | } ss8; |
| 341 | |
| 342 | struct { |
| 343 | uint32_t base_addr_hi:16; |
| 344 | uint32_t pad0:16; |
| 345 | } ss9; |
| 346 | |
| 347 | struct { |
| 348 | uint32_t pad0:12; |
| 349 | uint32_t aux_base_addr:20; |
| 350 | } ss10; |
| 351 | |
| 352 | struct { |
| 353 | uint32_t aux_base_addr_hi:16; |
| 354 | uint32_t pad:16; |
| 355 | } ss11; |
| 356 | |
| 357 | struct { |
| 358 | uint32_t hiz_depth_clear_value; |
| 359 | } ss12; |
| 360 | |
| 361 | struct { |
| 362 | uint32_t reserved; |
| 363 | } ss13; |
| 364 | |
| 365 | struct { |
| 366 | uint32_t reserved; |
| 367 | } ss14; |
| 368 | |
| 369 | struct { |
| 370 | uint32_t reserved; |
| 371 | } ss15; |
| 372 | }; |
| 373 | |
| Zhao Yakui | 54465b8 | 2014-02-11 10:48:45 +0800 | [diff] [blame] | 374 | |
| 375 | #define GEN9_PIPELINE_SELECTION_MASK (3 << 8) |
| 376 | |
| Zhao Yakui | d2e4eb3 | 2014-02-11 10:48:46 +0800 | [diff] [blame] | 377 | /* If enabled, it will force awake media enginee and the following instructions |
| 378 | * will require that the media enginee is awake. |
| 379 | */ |
| 380 | #define GEN9_FORCE_MEDIA_AWAKE_DISABLE (0 << 5) |
| 381 | #define GEN9_FORCE_MEDIA_AWAKE_ENABLE (1 << 5) |
| 382 | #define GEN9_FORCE_MEDIA_AWAKE_MASK (1 << 13) |
| 383 | |
| Zhao Yakui | 20e9cf3 | 2014-02-11 10:48:47 +0800 | [diff] [blame] | 384 | #define GEN9_SAMPLER_DOP_GATE_DISABLE (0 << 4) |
| 385 | #define GEN9_SAMPLER_DOP_GATE_ENABLE (1 << 4) |
| 386 | #define GEN9_SAMPLER_DOP_GATE_MASK (1 << 12) |
| 387 | |
| Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 388 | #endif /* GEN8_MEDIA_H */ |