1. 668e0df assembler: Rename dp_read_gen6 to gen6_dp_sampler_const_cache by Damien Lespiau · 12 years ago
  2. 31259c5 assembler: Rename three_src_gen6 to da3src by Damien Lespiau · 12 years ago
  3. e71f1d2 assembler: Sync brw_instruction's header with mesa's by Damien Lespiau · 12 years ago
  4. 191c859 build: Integrate the merged gen assembler in the build system by Damien Lespiau · 12 years ago[Renamed from assembler/src/gram.y]
  5. 5d72789 Fix typo. "donesn't" -> "doesn't" by Homer Hsing · 12 years ago
  6. 93f2a4f Add the CRE enginee for HSW+ by Zhao Yakui · 12 years ago
  7. 8aa9528 Add initial support for Haswell. by Gwenole Beauchesne · 12 years ago
  8. e221b0a Fix sub-register number of an address register encoding by Homer Hsing · 12 years ago
  9. 599d7d2 Fix symbol register subreg number calculation rule symbol_reg_p by Homer Hsing · 12 years ago
  10. e8cb195 Support Gen6 WHILE instruction by Homer Hsing · 12 years ago
  11. 2ad18c1 Make sure Gen6 IF works by Homer Hsing · 12 years ago
  12. c56d786 Make sure Gen6 ENDIF work by Homer Hsing · 12 years ago
  13. c91bd8c Fix Gen6 ELSE instructions code logic according to bspec. by Homer Hsing · 12 years ago
  14. ce55552 Make sure BREAK/CONT/HALT work on Gen6. by Homer Hsing · 12 years ago
  15. 3de439e Support Gen6 RET instruction. by Homer Hsing · 12 years ago
  16. 7529682 Support Gen6 CALL instruction. by Homer Hsing · 12 years ago
  17. b899aba Replace variable init code in WAIT by src_null_reg by Homer Hsing · 12 years ago
  18. 7e2461b Let ip_dst and ip_src become local const variable, so as to reduce replicated code. by Homer Hsing · 12 years ago
  19. 45ab3cf Support Gen6 three-source-operand instructions. by Homer Hsing · 12 years ago
  20. 72a3c19 Compile ELSE and WHILE in Gen5 as same way as in Gen4 by Homer Hsing · 12 years ago
  21. 4bf84ec Fully support Gen7 branching instructions by Homer Hsing · 12 years ago
  22. 88dfdf3 Supporting multi-branch instructios BRD & BRC by Homer Hsing · 12 years ago
  23. 5d589db Use right-recursing in parser rule inst_option_list by Homer Hsing · 12 years ago
  24. a7b1c09 Support subroutine instructions, CALL & RET by Homer Hsing · 12 years ago
  25. c0ebde2 Merge replicative code in gram.y by Homer Hsing · 12 years ago
  26. b0b540f Reduce replicative code in gram.y by reloc_target field in src_operand by Homer Hsing · 12 years ago
  27. 1f9a4d7 Restrict type of relativelocation2 to int by Homer Hsing · 12 years ago
  28. 751838e Add second_reloc_target in the data structure. by Homer Hsing · 12 years ago
  29. 2ab4c0d Fix memory leaking in the parser by Homer Hsing · 12 years ago
  30. bebe817 According to BSPEC, put PLN & BFI1 to binaryop, put SUBB to binaryaccop by Homer Hsing · 12 years ago
  31. 74383f4 Explain the difference between binaryinstruction and binaryaccinstruction by Homer Hsing · 12 years ago
  32. e6d61ac Merge same if branches in declare_pragma section in gram.y by Homer Hsing · 12 years ago
  33. 81859af Replace bzero by memset. by Homer Hsing · 12 years ago
  34. b1ef3bc Supporting integer subtraction with borrow by Homer Hsing · 12 years ago
  35. 9e711a4 Supporting find first bit instructions by Homer Hsing · 12 years ago
  36. b094cd8 Supporting half precision to single precision float convertion by Homer Hsing · 12 years ago
  37. 4285d9c Supporting count bit set instruction by Homer Hsing · 12 years ago
  38. d4f48a7 Supporting instruction "reverse bits" by Homer Hsing · 12 years ago
  39. 4d6337d Supporting instruction Bit Field Insert 1 by Homer Hsing · 12 years ago
  40. c3f1e0a Supporting addc instruction by Homer Hsing · 12 years ago
  41. 8ca5568 Supporting bit field extract and bit field insert 2 by Homer Hsing · 12 years ago
  42. 210510c Supporting LRP: dest = src0 * src1 + (1-src0) * src2 by Homer Hsing · 12 years ago
  43. a034bcb Support trinary source instruction "multiply add". by Homer Hsing · 12 years ago
  44. 4d75db5 Waring if both predication and conditional modifier are enabled but use different flag registers by Xiang, Haihao · 12 years ago
  45. 3ffbe96 Add support for flag register f1 on Ivy bridge by Xiang, Haihao · 12 years ago
  46. 2f772dd s/flag_reg_nr/flag_subreg_nr for an instruction by Xiang, Haihao · 12 years ago
  47. f3f6ba2 Change the rule for flag register by Xiang, Haihao · 12 years ago
  48. 128053f Accept symbol register as the leading register of the request by Xiang, Haihao · 12 years ago
  49. 0b5f7fa A new syntax of SEND intruction on Ivybridge by Xiang, Haihao · 13 years ago
  50. 86f8ca6 Support VME on Ivybridge by Xiang, Haihao · 13 years ago
  51. 2705039 Support DP for sampler/render/constant/data cache by Xiang, Haihao · 13 years ago
  52. e97f0bc sampler/render/constant cache unit since Sandybridge by Xiang, Haihao · 13 years ago
  53. 6a3a9e7 fix an error in commit cf76278 by Xiang, Haihao · 13 years ago
  54. 46ffdd5 SEND uses GRFs instead of MRFs on Ivybridge by Xiang, Haihao · 13 years ago
  55. 67d4ed6 Add support for sample (00000) on Ivybridge by Xiang, Haihao · 13 years ago
  56. c8d6bf3 Add support for data port read/write on Ivybridge by Xiang, Haihao · 13 years ago
  57. 37d6810 Send instruction on PRE-ILK by Feng, Boqun · 13 years ago
  58. 5239986 Add VME support in SEND by Zhou Chang · 13 years ago
  59. e7f4dc6 fix the parameters of register region by Xiang, Haihao · 13 years ago
  60. 85da7b9 send instruction on GEN6 by Xiang, Haihao · 13 years ago
  61. 852216d fix notification count register by Xiang, Haihao · 13 years ago
  62. 27b4303 Support instructions which strictly follow the documents. by Xiang, Haihao · 14 years ago
  63. 66649d7 1. fix DOT 2. rule for instrseq by Chen, Yangyang · 14 years ago
  64. 14c0bd0 Support for headerless write by Xiang, Haihao · 14 years ago
  65. 5405532 add support for math instruction on Sandybridge by Xiang, Haihao · 14 years ago
  66. f1f5208 add support for plane instruction (pln) by Xiang, Haihao · 14 years ago
  67. dcdde53 Send on Sandybridge uses a message register as operand src0 by Xiang, Haihao · 14 years ago
  68. c2382ca no compression flag on Sandybridge by Xiang, Haihao · 14 years ago
  69. 718cd6c print error message when using math function on Sandybridge. by Xiang, Haihao · 14 years ago
  70. 9d2be25 sampler, urb write, null and gateway on Sandybridge are same as Ironlake. by Xiang, Haihao · 14 years ago
  71. a8458d5 add support for data port read on Sandybridge by Xiang, Haihao · 14 years ago
  72. 61784db add support for data port write on Sandybridge. by Xiang, Haihao · 14 years ago
  73. 4f777e7 fix send instruction on Sandybridge by Xiang, Haihao · 14 years ago
  74. 55d81c4 add AccWrCtrl flag on Sandybridge by Xiang, Haihao · 14 years ago
  75. 5bcf1f5 always set destination horiz stride for Align16 to 1 on Sandybridge. by Xiang, Haihao · 14 years ago
  76. db8aedc use left recursion instead of right recursion to avoid memory exhausted issue when compiling large source files by Zou Nan hai · 14 years ago
  77. c6f2da4 1. type syntax :ud :uw etc 2. empty instruction option 3. remove a conflict by Zou Nan hai · 15 years ago
  78. 5608d27 support simple expression by Zou Nan hai · 15 years ago
  79. 549b751 Add support for GEN5 by Xiang Haihao · 15 years ago
  80. be9bcee Add support for labeled and conditional branches by Zou Nanhai · 16 years ago
  81. 807f876 Add support for dp_read message. by Zou Nan hai · 16 years ago
  82. 26afe90 Add thread_spawner message target support. by Zou Nan hai · 16 years ago
  83. 2033aea Add conditional support to assembler. Add align16 dest support to disasm. by Keith Packard · 16 years ago
  84. 2d4d401 Add packed vector immediate values by Keith Packard · 16 years ago
  85. 4ee9c3d Add break, cont, and halt instructions. by Eric Anholt · 18 years ago
  86. f45ac8b Fix the exitcode type for ENDIF to be D instead of UD. by Eric Anholt · 18 years ago
  87. 960ca00 Fix initialization of null reg for ELSE, and set the pop count right. by Eric Anholt · 18 years ago
  88. 1f58efa Add support for the WAIT instruction. by Eric Anholt · 18 years ago
  89. 330903a Parse negative integers for imm32s, and don't exceed the IP count width field. by Eric Anholt · 18 years ago
  90. 56cdee4 Initialize the structure used for setting up the ip src/dst in branches/jumps. by Eric Anholt · 18 years ago
  91. 356ce76 Add a rule for the ELSE instruction. by Eric Anholt · 18 years ago
  92. 1e907c7 Add rules for branch and jump instructions. by Eric Anholt · 18 years ago
  93. d777129 Add DO and ENDIF instructions. by Eric Anholt · 18 years ago
  94. 74c81af Fix a compiler warning by defining struct {in,}direct_reg at the top level. by Eric Anholt · 18 years ago
  95. c8939ed Fix issues in the grammar that caused errors in bison. by Eric Anholt · 18 years ago
  96. 9b40c37 Add autotools build system, and rearrange directory layout. by Eric Anholt · 18 years ago[Renamed from assembler/gram.y]
  97. 2d29874 Add support for register-indirect addressing in source operands. by Eric Anholt · 18 years ago
  98. 3bcf6b2 Add support for register-indirect access in destination registers. by Eric Anholt · 18 years ago
  99. 2dac0a1 Add support for destination writemasks. by Eric Anholt · 18 years ago
  100. de1a889 Avoid shift/reduce conflict in predicate by making flagreg and subreg 1 token. by Eric Anholt · 18 years ago