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Christopher Ferris7c0b6392015-01-23 15:34:26 -08001#ifndef __TARGET_CORE_USER_H
2#define __TARGET_CORE_USER_H
3
4/* This header will be used by application too */
5
6#include <linux/types.h>
7#include <linux/uio.h>
8
Christopher Ferris12e1f282016-02-04 12:35:07 -08009#define TCMU_VERSION "2.0"
Christopher Ferris7c0b6392015-01-23 15:34:26 -080010
11/*
12 * Ring Design
13 * -----------
14 *
15 * The mmaped area is divided into three parts:
16 * 1) The mailbox (struct tcmu_mailbox, below)
17 * 2) The command ring
18 * 3) Everything beyond the command ring (data)
19 *
20 * The mailbox tells userspace the offset of the command ring from the
21 * start of the shared memory region, and how big the command ring is.
22 *
23 * The kernel passes SCSI commands to userspace by putting a struct
24 * tcmu_cmd_entry in the ring, updating mailbox->cmd_head, and poking
25 * userspace via uio's interrupt mechanism.
26 *
27 * tcmu_cmd_entry contains a header. If the header type is PAD,
28 * userspace should skip hdr->length bytes (mod cmdr_size) to find the
29 * next cmd_entry.
30 *
31 * Otherwise, the entry will contain offsets into the mmaped area that
32 * contain the cdb and data buffers -- the latter accessible via the
33 * iov array. iov addresses are also offsets into the shared area.
34 *
35 * When userspace is completed handling the command, set
36 * entry->rsp.scsi_status, fill in rsp.sense_buffer if appropriate,
37 * and also set mailbox->cmd_tail equal to the old cmd_tail plus
38 * hdr->length, mod cmdr_size. If cmd_tail doesn't equal cmd_head, it
39 * should process the next packet the same way, and so on.
40 */
41
Christopher Ferris12e1f282016-02-04 12:35:07 -080042#define TCMU_MAILBOX_VERSION 2
Christopher Ferris7c0b6392015-01-23 15:34:26 -080043#define ALIGN_SIZE 64 /* Should be enough for most CPUs */
44
45struct tcmu_mailbox {
46 __u16 version;
47 __u16 flags;
48 __u32 cmdr_off;
49 __u32 cmdr_size;
50
51 __u32 cmd_head;
52
53 /* Updated by user. On its own cacheline */
54 __u32 cmd_tail __attribute__((__aligned__(ALIGN_SIZE)));
55
56} __packed;
57
58enum tcmu_opcode {
59 TCMU_OP_PAD = 0,
60 TCMU_OP_CMD,
61};
62
63/*
64 * Only a few opcodes, and length is 8-byte aligned, so use low bits for opcode.
65 */
66struct tcmu_cmd_entry_hdr {
Christopher Ferris12e1f282016-02-04 12:35:07 -080067 __u32 len_op;
68 __u16 cmd_id;
69 __u8 kflags;
70#define TCMU_UFLAG_UNKNOWN_OP 0x1
71 __u8 uflags;
72
Christopher Ferris7c0b6392015-01-23 15:34:26 -080073} __packed;
74
75#define TCMU_OP_MASK 0x7
76
Christopher Ferris12e1f282016-02-04 12:35:07 -080077static inline enum tcmu_opcode tcmu_hdr_get_op(__u32 len_op)
Christopher Ferris7c0b6392015-01-23 15:34:26 -080078{
Christopher Ferris12e1f282016-02-04 12:35:07 -080079 return len_op & TCMU_OP_MASK;
Christopher Ferris7c0b6392015-01-23 15:34:26 -080080}
81
Christopher Ferris12e1f282016-02-04 12:35:07 -080082static inline void tcmu_hdr_set_op(__u32 *len_op, enum tcmu_opcode op)
Christopher Ferris7c0b6392015-01-23 15:34:26 -080083{
Christopher Ferris12e1f282016-02-04 12:35:07 -080084 *len_op &= ~TCMU_OP_MASK;
85 *len_op |= (op & TCMU_OP_MASK);
Christopher Ferris7c0b6392015-01-23 15:34:26 -080086}
87
Christopher Ferris12e1f282016-02-04 12:35:07 -080088static inline __u32 tcmu_hdr_get_len(__u32 len_op)
Christopher Ferris7c0b6392015-01-23 15:34:26 -080089{
Christopher Ferris12e1f282016-02-04 12:35:07 -080090 return len_op & ~TCMU_OP_MASK;
Christopher Ferris7c0b6392015-01-23 15:34:26 -080091}
92
Christopher Ferris12e1f282016-02-04 12:35:07 -080093static inline void tcmu_hdr_set_len(__u32 *len_op, __u32 len)
Christopher Ferris7c0b6392015-01-23 15:34:26 -080094{
Christopher Ferris12e1f282016-02-04 12:35:07 -080095 *len_op &= TCMU_OP_MASK;
96 *len_op |= len;
Christopher Ferris7c0b6392015-01-23 15:34:26 -080097}
98
99/* Currently the same as SCSI_SENSE_BUFFERSIZE */
100#define TCMU_SENSE_BUFFERSIZE 96
101
102struct tcmu_cmd_entry {
103 struct tcmu_cmd_entry_hdr hdr;
104
Christopher Ferris7c0b6392015-01-23 15:34:26 -0800105 union {
106 struct {
Christopher Ferris12e1f282016-02-04 12:35:07 -0800107 uint32_t iov_cnt;
108 uint32_t iov_bidi_cnt;
109 uint32_t iov_dif_cnt;
Christopher Ferris7c0b6392015-01-23 15:34:26 -0800110 uint64_t cdb_off;
Christopher Ferris12e1f282016-02-04 12:35:07 -0800111 uint64_t __pad1;
112 uint64_t __pad2;
Christopher Ferris7c0b6392015-01-23 15:34:26 -0800113 struct iovec iov[0];
114 } req;
115 struct {
116 uint8_t scsi_status;
117 uint8_t __pad1;
118 uint16_t __pad2;
119 uint32_t __pad3;
120 char sense_buffer[TCMU_SENSE_BUFFERSIZE];
121 } rsp;
122 };
123
124} __packed;
125
126#define TCMU_OP_ALIGN_SIZE sizeof(uint64_t)
127
128enum tcmu_genl_cmd {
129 TCMU_CMD_UNSPEC,
130 TCMU_CMD_ADDED_DEVICE,
131 TCMU_CMD_REMOVED_DEVICE,
132 __TCMU_CMD_MAX,
133};
134#define TCMU_CMD_MAX (__TCMU_CMD_MAX - 1)
135
136enum tcmu_genl_attr {
137 TCMU_ATTR_UNSPEC,
138 TCMU_ATTR_DEVICE,
139 TCMU_ATTR_MINOR,
140 __TCMU_ATTR_MAX,
141};
142#define TCMU_ATTR_MAX (__TCMU_ATTR_MAX - 1)
143
144#endif