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Christopher Ferris25981132017-11-14 16:53:49 -08001/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
Ben Cheng30692c62013-10-15 18:26:18 -07002/* ------------------------------------------------------------------------- */
3/* */
4/* i2c.h - definitions for the i2c-bus interface */
5/* */
6/* ------------------------------------------------------------------------- */
7/* Copyright (C) 1995-2000 Simon G. Vogl
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 MA 02110-1301 USA. */
23/* ------------------------------------------------------------------------- */
24
25/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
26 Frodo Looijaard <frodol@dds.nl> */
27
28#ifndef _UAPI_LINUX_I2C_H
29#define _UAPI_LINUX_I2C_H
30
31#include <linux/types.h>
32
33/**
34 * struct i2c_msg - an I2C transaction segment beginning with START
35 * @addr: Slave address, either seven or ten bits. When this is a ten
36 * bit address, I2C_M_TEN must be set in @flags and the adapter
37 * must support I2C_FUNC_10BIT_ADDR.
38 * @flags: I2C_M_RD is handled by all adapters. No other flags may be
39 * provided unless the adapter exported the relevant I2C_FUNC_*
40 * flags through i2c_check_functionality().
41 * @len: Number of data bytes in @buf being read from or written to the
42 * I2C slave address. For read transactions where I2C_M_RECV_LEN
43 * is set, the caller guarantees that this buffer can hold up to
44 * 32 bytes in addition to the initial length byte sent by the
45 * slave (plus, if used, the SMBus PEC); and this value will be
46 * incremented by the number of block data bytes received.
47 * @buf: The buffer into which data is read, or from which it's written.
48 *
49 * An i2c_msg is the low level representation of one segment of an I2C
50 * transaction. It is visible to drivers in the @i2c_transfer() procedure,
51 * to userspace from i2c-dev, and to I2C adapter drivers through the
52 * @i2c_adapter.@master_xfer() method.
53 *
54 * Except when I2C "protocol mangling" is used, all I2C adapters implement
55 * the standard rules for I2C transactions. Each transaction begins with a
56 * START. That is followed by the slave address, and a bit encoding read
57 * versus write. Then follow all the data bytes, possibly including a byte
58 * with SMBus PEC. The transfer terminates with a NAK, or when all those
59 * bytes have been transferred and ACKed. If this is the last message in a
60 * group, it is followed by a STOP. Otherwise it is followed by the next
61 * @i2c_msg transaction segment, beginning with a (repeated) START.
62 *
63 * Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then
64 * passing certain @flags may have changed those standard protocol behaviors.
65 * Those flags are only for use with broken/nonconforming slaves, and with
66 * adapters which are known to support the specific mangling options they
67 * need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR).
68 */
69struct i2c_msg {
70 __u16 addr; /* slave address */
71 __u16 flags;
Ben Cheng30692c62013-10-15 18:26:18 -070072#define I2C_M_RD 0x0001 /* read data, from slave to master */
Christopher Ferrisccfaccd2016-08-24 12:11:31 -070073 /* I2C_M_RD is guaranteed to be 0x0001! */
74#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */
Ben Cheng30692c62013-10-15 18:26:18 -070075#define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */
Christopher Ferrisccfaccd2016-08-24 12:11:31 -070076#define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */
77#define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */
78#define I2C_M_REV_DIR_ADDR 0x2000 /* if I2C_FUNC_PROTOCOL_MANGLING */
79#define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_NOSTART */
80#define I2C_M_STOP 0x8000 /* if I2C_FUNC_PROTOCOL_MANGLING */
Ben Cheng30692c62013-10-15 18:26:18 -070081 __u16 len; /* msg length */
82 __u8 *buf; /* pointer to msg data */
83};
84
85/* To determine what functionality is present */
86
87#define I2C_FUNC_I2C 0x00000001
88#define I2C_FUNC_10BIT_ADDR 0x00000002
89#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_IGNORE_NAK etc. */
90#define I2C_FUNC_SMBUS_PEC 0x00000008
91#define I2C_FUNC_NOSTART 0x00000010 /* I2C_M_NOSTART */
Christopher Ferris12e1f282016-02-04 12:35:07 -080092#define I2C_FUNC_SLAVE 0x00000020
Ben Cheng30692c62013-10-15 18:26:18 -070093#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
94#define I2C_FUNC_SMBUS_QUICK 0x00010000
95#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
96#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
97#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
98#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
99#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
100#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
101#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
102#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
103#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
104#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
105#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
Christopher Ferris6e3550f2016-12-12 14:51:18 -0800106#define I2C_FUNC_SMBUS_HOST_NOTIFY 0x10000000
Ben Cheng30692c62013-10-15 18:26:18 -0700107
108#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
109 I2C_FUNC_SMBUS_WRITE_BYTE)
110#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \
111 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
112#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \
113 I2C_FUNC_SMBUS_WRITE_WORD_DATA)
114#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
115 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
116#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
117 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
118
119#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \
120 I2C_FUNC_SMBUS_BYTE | \
121 I2C_FUNC_SMBUS_BYTE_DATA | \
122 I2C_FUNC_SMBUS_WORD_DATA | \
123 I2C_FUNC_SMBUS_PROC_CALL | \
124 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
125 I2C_FUNC_SMBUS_I2C_BLOCK | \
126 I2C_FUNC_SMBUS_PEC)
127
128/*
129 * Data for SMBus Messages
130 */
131#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */
132union i2c_smbus_data {
133 __u8 byte;
134 __u16 word;
135 __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
136 /* and one more for user-space compatibility */
137};
138
139/* i2c_smbus_xfer read or write markers */
140#define I2C_SMBUS_READ 1
141#define I2C_SMBUS_WRITE 0
142
143/* SMBus transaction types (size parameter in the above functions)
144 Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
145#define I2C_SMBUS_QUICK 0
146#define I2C_SMBUS_BYTE 1
147#define I2C_SMBUS_BYTE_DATA 2
148#define I2C_SMBUS_WORD_DATA 3
149#define I2C_SMBUS_PROC_CALL 4
150#define I2C_SMBUS_BLOCK_DATA 5
151#define I2C_SMBUS_I2C_BLOCK_BROKEN 6
152#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */
153#define I2C_SMBUS_I2C_BLOCK_DATA 8
154
155#endif /* _UAPI_LINUX_I2C_H */