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Hamsalekha S8d3d3032015-03-13 21:24:58 +05301/******************************************************************************
2 *
3 * Copyright (C) 2015 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19*/
20
21/*****************************************************************************/
22/* */
23/* File Name : ih264d_api.c */
24/* */
25/* Description : Has all API related functions */
26/* */
27/* */
28/* List of Functions : api_check_struct_sanity */
29/* ih264d_set_processor */
Harish Mahendrakar251b0072015-08-04 09:55:15 +053030/* ih264d_create */
31/* ih264d_delete */
Hamsalekha S8d3d3032015-03-13 21:24:58 +053032/* ih264d_init */
33/* ih264d_map_error */
34/* ih264d_video_decode */
35/* ih264d_get_version */
36/* ih264d_get_display_frame */
37/* ih264d_set_display_frame */
38/* ih264d_set_flush_mode */
39/* ih264d_get_status */
40/* ih264d_get_buf_info */
41/* ih264d_set_params */
42/* ih264d_set_default_params */
43/* ih264d_reset */
44/* ih264d_ctl */
45/* ih264d_rel_display_frame */
46/* ih264d_set_degrade */
47/* ih264d_get_frame_dimensions */
48/* ih264d_set_num_cores */
49/* ih264d_fill_output_struct_from_context */
50/* ih264d_api_function */
51/* */
52/* Issues / Problems : None */
53/* */
54/* Revision History : */
55/* */
56/* DD MM YYYY Author(s) Changes (Describe the changes made) */
57/* 14 10 2008 100356(SKV) Draft */
58/* */
59/*****************************************************************************/
60#include "ih264_typedefs.h"
61#include "ih264_macros.h"
62#include "ih264_platform_macros.h"
63#include "ih264d_tables.h"
64#include "iv.h"
65#include "ivd.h"
66#include "ih264d.h"
67#include "ih264d_defs.h"
68
69#include <string.h>
70#include <limits.h>
71#include <stddef.h>
72
73#include "ih264d_inter_pred.h"
74
75#include "ih264d_structs.h"
76#include "ih264d_nal.h"
77#include "ih264d_error_handler.h"
78
79#include "ih264d_defs.h"
80
81#include "ithread.h"
82#include "ih264d_parse_slice.h"
83#include "ih264d_function_selector.h"
84#include "ih264_error.h"
85#include "ih264_disp_mgr.h"
86#include "ih264_buf_mgr.h"
87#include "ih264d_deblocking.h"
88#include "ih264d_parse_cavlc.h"
89#include "ih264d_parse_cabac.h"
90#include "ih264d_utils.h"
91#include "ih264d_format_conv.h"
92#include "ih264d_parse_headers.h"
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -070093#include "ih264d_thread_compute_bs.h"
Hamsalekha S8d3d3032015-03-13 21:24:58 +053094#include <assert.h>
95
96
97/*********************/
98/* Codec Versioning */
99/*********************/
100//Move this to where it is used
101#define CODEC_NAME "H264VDEC"
102#define CODEC_RELEASE_TYPE "production"
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530103#define CODEC_RELEASE_VER "05.00"
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530104#define CODEC_VENDOR "ITTIAM"
105#define MAXVERSION_STRLEN 511
Dan Willemsen1c01bc12015-10-27 17:52:13 -0700106#ifdef __ANDROID__
107#define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor) \
108 snprintf(version_string, MAXVERSION_STRLEN, \
109 "@(#)Id:%s_%s Ver:%s Released by %s", \
110 codec_name, codec_release_type, codec_release_ver, codec_vendor)
111#else
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530112#define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor) \
Martin Storsjo85a43d22015-05-20 00:12:28 +0300113 snprintf(version_string, MAXVERSION_STRLEN, \
114 "@(#)Id:%s_%s Ver:%s Released by %s Build: %s @ %s", \
115 codec_name, codec_release_type, codec_release_ver, codec_vendor, __DATE__, __TIME__)
Dan Willemsen1c01bc12015-10-27 17:52:13 -0700116#endif
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530117
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530118
119#define MIN_IN_BUFS 1
120#define MIN_OUT_BUFS_420 3
121#define MIN_OUT_BUFS_422ILE 1
122#define MIN_OUT_BUFS_RGB565 1
123#define MIN_OUT_BUFS_420SP 2
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530124
125#define NUM_FRAMES_LIMIT_ENABLED 0
126
127#if NUM_FRAMES_LIMIT_ENABLED
128#define NUM_FRAMES_LIMIT 10000
129#else
130#define NUM_FRAMES_LIMIT 0x7FFFFFFF
131#endif
132
133
134UWORD32 ih264d_get_extra_mem_external(UWORD32 width, UWORD32 height);
135WORD32 ih264d_get_frame_dimensions(iv_obj_t *dec_hdl,
136 void *pv_api_ip,
137 void *pv_api_op);
138WORD32 ih264d_set_num_cores(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op);
139
140WORD32 ih264d_deblock_display(dec_struct_t *ps_dec);
141
142void ih264d_signal_decode_thread(dec_struct_t *ps_dec);
143
144void ih264d_signal_bs_deblk_thread(dec_struct_t *ps_dec);
145void ih264d_decode_picture_thread(dec_struct_t *ps_dec);
146
147WORD32 ih264d_set_degrade(iv_obj_t *ps_codec_obj,
148 void *pv_api_ip,
149 void *pv_api_op);
150
151void ih264d_fill_output_struct_from_context(dec_struct_t *ps_dec,
152 ivd_video_decode_op_t *ps_dec_op);
153
154static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
155 void *pv_api_ip,
156 void *pv_api_op)
157{
158 IVD_API_COMMAND_TYPE_T e_cmd;
159 UWORD32 *pu4_api_ip;
160 UWORD32 *pu4_api_op;
161 UWORD32 i, j;
162
163 if(NULL == pv_api_op)
164 return (IV_FAIL);
165
166 if(NULL == pv_api_ip)
167 return (IV_FAIL);
168
169 pu4_api_ip = (UWORD32 *)pv_api_ip;
170 pu4_api_op = (UWORD32 *)pv_api_op;
171 e_cmd = *(pu4_api_ip + 1);
172
173 /* error checks on handle */
174 switch((WORD32)e_cmd)
175 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530176 case IVD_CMD_CREATE:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530177 break;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530178
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530179 case IVD_CMD_REL_DISPLAY_FRAME:
180 case IVD_CMD_SET_DISPLAY_FRAME:
181 case IVD_CMD_GET_DISPLAY_FRAME:
182 case IVD_CMD_VIDEO_DECODE:
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530183 case IVD_CMD_DELETE:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530184 case IVD_CMD_VIDEO_CTL:
185 if(ps_handle == NULL)
186 {
187 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
188 *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
189 return IV_FAIL;
190 }
191
192 if(ps_handle->u4_size != sizeof(iv_obj_t))
193 {
194 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
195 *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
196 return IV_FAIL;
197 }
198
199 if(ps_handle->pv_fxns != ih264d_api_function)
200 {
201 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
202 *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
203 return IV_FAIL;
204 }
205
206 if(ps_handle->pv_codec_handle == NULL)
207 {
208 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
209 *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
210 return IV_FAIL;
211 }
212 break;
213 default:
214 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
215 *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
216 return IV_FAIL;
217 }
218
219 switch((WORD32)e_cmd)
220 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530221 case IVD_CMD_CREATE:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530222 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530223 ih264d_create_ip_t *ps_ip = (ih264d_create_ip_t *)pv_api_ip;
224 ih264d_create_op_t *ps_op = (ih264d_create_op_t *)pv_api_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530225
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530226
227 ps_op->s_ivd_create_op_t.u4_error_code = 0;
228
229 if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ih264d_create_ip_t))
230 || (ps_ip->s_ivd_create_ip_t.u4_size
231 < sizeof(ivd_create_ip_t)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530232 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530233 ps_op->s_ivd_create_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530234 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530235 ps_op->s_ivd_create_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530236 IVD_IP_API_STRUCT_SIZE_INCORRECT;
237 H264_DEC_DEBUG_PRINT("\n");
238 return (IV_FAIL);
239 }
240
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530241 if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ih264d_create_op_t))
242 && (ps_op->s_ivd_create_op_t.u4_size
243 != sizeof(ivd_create_op_t)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530244 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530245 ps_op->s_ivd_create_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530246 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530247 ps_op->s_ivd_create_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530248 IVD_OP_API_STRUCT_SIZE_INCORRECT;
249 H264_DEC_DEBUG_PRINT("\n");
250 return (IV_FAIL);
251 }
252
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530253
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530254 if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
255 && (ps_ip->s_ivd_create_ip_t.e_output_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530256 != IV_YUV_422ILE)
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530257 && (ps_ip->s_ivd_create_ip_t.e_output_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530258 != IV_RGB_565)
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530259 && (ps_ip->s_ivd_create_ip_t.e_output_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530260 != IV_YUV_420SP_UV)
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530261 && (ps_ip->s_ivd_create_ip_t.e_output_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530262 != IV_YUV_420SP_VU))
263 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530264 ps_op->s_ivd_create_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530265 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530266 ps_op->s_ivd_create_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530267 IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
268 H264_DEC_DEBUG_PRINT("\n");
269 return (IV_FAIL);
270 }
271
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530272 }
273 break;
274
275 case IVD_CMD_GET_DISPLAY_FRAME:
276 {
277 ih264d_get_display_frame_ip_t *ps_ip =
278 (ih264d_get_display_frame_ip_t *)pv_api_ip;
279 ih264d_get_display_frame_op_t *ps_op =
280 (ih264d_get_display_frame_op_t *)pv_api_op;
281
282 ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
283
284 if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
285 != sizeof(ih264d_get_display_frame_ip_t))
286 && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
287 != sizeof(ivd_get_display_frame_ip_t)))
288 {
289 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
290 << IVD_UNSUPPORTEDPARAM;
291 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
292 IVD_IP_API_STRUCT_SIZE_INCORRECT;
293 return (IV_FAIL);
294 }
295
296 if((ps_op->s_ivd_get_display_frame_op_t.u4_size
297 != sizeof(ih264d_get_display_frame_op_t))
298 && (ps_op->s_ivd_get_display_frame_op_t.u4_size
299 != sizeof(ivd_get_display_frame_op_t)))
300 {
301 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
302 << IVD_UNSUPPORTEDPARAM;
303 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
304 IVD_OP_API_STRUCT_SIZE_INCORRECT;
305 return (IV_FAIL);
306 }
307 }
308 break;
309
310 case IVD_CMD_REL_DISPLAY_FRAME:
311 {
312 ih264d_rel_display_frame_ip_t *ps_ip =
313 (ih264d_rel_display_frame_ip_t *)pv_api_ip;
314 ih264d_rel_display_frame_op_t *ps_op =
315 (ih264d_rel_display_frame_op_t *)pv_api_op;
316
317 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
318
319 if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
320 != sizeof(ih264d_rel_display_frame_ip_t))
321 && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
322 != sizeof(ivd_rel_display_frame_ip_t)))
323 {
324 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
325 << IVD_UNSUPPORTEDPARAM;
326 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
327 IVD_IP_API_STRUCT_SIZE_INCORRECT;
328 return (IV_FAIL);
329 }
330
331 if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
332 != sizeof(ih264d_rel_display_frame_op_t))
333 && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
334 != sizeof(ivd_rel_display_frame_op_t)))
335 {
336 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
337 << IVD_UNSUPPORTEDPARAM;
338 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
339 IVD_OP_API_STRUCT_SIZE_INCORRECT;
340 return (IV_FAIL);
341 }
342
343 }
344 break;
345
346 case IVD_CMD_SET_DISPLAY_FRAME:
347 {
348 ih264d_set_display_frame_ip_t *ps_ip =
349 (ih264d_set_display_frame_ip_t *)pv_api_ip;
350 ih264d_set_display_frame_op_t *ps_op =
351 (ih264d_set_display_frame_op_t *)pv_api_op;
352 UWORD32 j;
353
354 ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
355
356 if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
357 != sizeof(ih264d_set_display_frame_ip_t))
358 && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
359 != sizeof(ivd_set_display_frame_ip_t)))
360 {
361 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
362 << IVD_UNSUPPORTEDPARAM;
363 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
364 IVD_IP_API_STRUCT_SIZE_INCORRECT;
365 return (IV_FAIL);
366 }
367
368 if((ps_op->s_ivd_set_display_frame_op_t.u4_size
369 != sizeof(ih264d_set_display_frame_op_t))
370 && (ps_op->s_ivd_set_display_frame_op_t.u4_size
371 != sizeof(ivd_set_display_frame_op_t)))
372 {
373 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
374 << IVD_UNSUPPORTEDPARAM;
375 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
376 IVD_OP_API_STRUCT_SIZE_INCORRECT;
377 return (IV_FAIL);
378 }
379
380 if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
381 {
382 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
383 << IVD_UNSUPPORTEDPARAM;
384 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
385 IVD_DISP_FRM_ZERO_OP_BUFS;
386 return IV_FAIL;
387 }
388
389 for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
390 j++)
391 {
392 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
393 == 0)
394 {
395 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
396 << IVD_UNSUPPORTEDPARAM;
397 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
398 IVD_DISP_FRM_ZERO_OP_BUFS;
399 return IV_FAIL;
400 }
401
402 for(i = 0;
403 i
404 < ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
405 i++)
406 {
407 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
408 == NULL)
409 {
410 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
411 << IVD_UNSUPPORTEDPARAM;
412 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
413 IVD_DISP_FRM_OP_BUF_NULL;
414 return IV_FAIL;
415 }
416
417 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
418 == 0)
419 {
420 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
421 << IVD_UNSUPPORTEDPARAM;
422 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
423 IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
424 return IV_FAIL;
425 }
426 }
427 }
428 }
429 break;
430
431 case IVD_CMD_VIDEO_DECODE:
432 {
433 ih264d_video_decode_ip_t *ps_ip =
434 (ih264d_video_decode_ip_t *)pv_api_ip;
435 ih264d_video_decode_op_t *ps_op =
436 (ih264d_video_decode_op_t *)pv_api_op;
437
438 H264_DEC_DEBUG_PRINT("The input bytes is: %d",
439 ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
440 ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
441
442 if(ps_ip->s_ivd_video_decode_ip_t.u4_size
443 != sizeof(ih264d_video_decode_ip_t)&&
444 ps_ip->s_ivd_video_decode_ip_t.u4_size != offsetof(ivd_video_decode_ip_t, s_out_buffer))
445 {
446 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
447 << IVD_UNSUPPORTEDPARAM;
448 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
449 IVD_IP_API_STRUCT_SIZE_INCORRECT;
450 return (IV_FAIL);
451 }
452
453 if(ps_op->s_ivd_video_decode_op_t.u4_size
454 != sizeof(ih264d_video_decode_op_t)&&
455 ps_op->s_ivd_video_decode_op_t.u4_size != offsetof(ivd_video_decode_op_t, u4_output_present))
456 {
457 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
458 << IVD_UNSUPPORTEDPARAM;
459 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
460 IVD_OP_API_STRUCT_SIZE_INCORRECT;
461 return (IV_FAIL);
462 }
463
464 }
465 break;
466
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530467 case IVD_CMD_DELETE:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530468 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530469 ih264d_delete_ip_t *ps_ip =
470 (ih264d_delete_ip_t *)pv_api_ip;
471 ih264d_delete_op_t *ps_op =
472 (ih264d_delete_op_t *)pv_api_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530473
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530474 ps_op->s_ivd_delete_op_t.u4_error_code = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530475
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530476 if(ps_ip->s_ivd_delete_ip_t.u4_size
477 != sizeof(ih264d_delete_ip_t))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530478 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530479 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530480 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530481 ps_op->s_ivd_delete_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530482 IVD_IP_API_STRUCT_SIZE_INCORRECT;
483 return (IV_FAIL);
484 }
485
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530486 if(ps_op->s_ivd_delete_op_t.u4_size
487 != sizeof(ih264d_delete_op_t))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530488 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530489 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530490 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530491 ps_op->s_ivd_delete_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530492 IVD_OP_API_STRUCT_SIZE_INCORRECT;
493 return (IV_FAIL);
494 }
495
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530496 }
497 break;
498
499 case IVD_CMD_VIDEO_CTL:
500 {
501 UWORD32 *pu4_ptr_cmd;
502 UWORD32 sub_command;
503
504 pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
505 pu4_ptr_cmd += 2;
506 sub_command = *pu4_ptr_cmd;
507
508 switch(sub_command)
509 {
510 case IVD_CMD_CTL_SETPARAMS:
511 {
512 ih264d_ctl_set_config_ip_t *ps_ip;
513 ih264d_ctl_set_config_op_t *ps_op;
514 ps_ip = (ih264d_ctl_set_config_ip_t *)pv_api_ip;
515 ps_op = (ih264d_ctl_set_config_op_t *)pv_api_op;
516
517 if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
518 != sizeof(ih264d_ctl_set_config_ip_t))
519 {
520 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
521 << IVD_UNSUPPORTEDPARAM;
522 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
523 IVD_IP_API_STRUCT_SIZE_INCORRECT;
524 return IV_FAIL;
525 }
526 }
527 //no break; is needed here
528 case IVD_CMD_CTL_SETDEFAULT:
529 {
530 ih264d_ctl_set_config_op_t *ps_op;
531 ps_op = (ih264d_ctl_set_config_op_t *)pv_api_op;
532 if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
533 != sizeof(ih264d_ctl_set_config_op_t))
534 {
535 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
536 << IVD_UNSUPPORTEDPARAM;
537 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
538 IVD_OP_API_STRUCT_SIZE_INCORRECT;
539 return IV_FAIL;
540 }
541 }
542 break;
543
544 case IVD_CMD_CTL_GETPARAMS:
545 {
546 ih264d_ctl_getstatus_ip_t *ps_ip;
547 ih264d_ctl_getstatus_op_t *ps_op;
548
549 ps_ip = (ih264d_ctl_getstatus_ip_t *)pv_api_ip;
550 ps_op = (ih264d_ctl_getstatus_op_t *)pv_api_op;
551 if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
552 != sizeof(ih264d_ctl_getstatus_ip_t))
553 {
554 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
555 << IVD_UNSUPPORTEDPARAM;
556 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
557 IVD_IP_API_STRUCT_SIZE_INCORRECT;
558 return IV_FAIL;
559 }
560 if(ps_op->s_ivd_ctl_getstatus_op_t.u4_size
561 != sizeof(ih264d_ctl_getstatus_op_t))
562 {
563 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
564 << IVD_UNSUPPORTEDPARAM;
565 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
566 IVD_OP_API_STRUCT_SIZE_INCORRECT;
567 return IV_FAIL;
568 }
569 }
570 break;
571
572 case IVD_CMD_CTL_GETBUFINFO:
573 {
574 ih264d_ctl_getbufinfo_ip_t *ps_ip;
575 ih264d_ctl_getbufinfo_op_t *ps_op;
576 ps_ip = (ih264d_ctl_getbufinfo_ip_t *)pv_api_ip;
577 ps_op = (ih264d_ctl_getbufinfo_op_t *)pv_api_op;
578
579 if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
580 != sizeof(ih264d_ctl_getbufinfo_ip_t))
581 {
582 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
583 << IVD_UNSUPPORTEDPARAM;
584 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
585 IVD_IP_API_STRUCT_SIZE_INCORRECT;
586 return IV_FAIL;
587 }
588 if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
589 != sizeof(ih264d_ctl_getbufinfo_op_t))
590 {
591 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
592 << IVD_UNSUPPORTEDPARAM;
593 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
594 IVD_OP_API_STRUCT_SIZE_INCORRECT;
595 return IV_FAIL;
596 }
597 }
598 break;
599
600 case IVD_CMD_CTL_GETVERSION:
601 {
602 ih264d_ctl_getversioninfo_ip_t *ps_ip;
603 ih264d_ctl_getversioninfo_op_t *ps_op;
604 ps_ip = (ih264d_ctl_getversioninfo_ip_t *)pv_api_ip;
605 ps_op = (ih264d_ctl_getversioninfo_op_t *)pv_api_op;
606 if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
607 != sizeof(ih264d_ctl_getversioninfo_ip_t))
608 {
609 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
610 << IVD_UNSUPPORTEDPARAM;
611 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
612 IVD_IP_API_STRUCT_SIZE_INCORRECT;
613 return IV_FAIL;
614 }
615 if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
616 != sizeof(ih264d_ctl_getversioninfo_op_t))
617 {
618 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
619 << IVD_UNSUPPORTEDPARAM;
620 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
621 IVD_OP_API_STRUCT_SIZE_INCORRECT;
622 return IV_FAIL;
623 }
624 }
625 break;
626
627 case IVD_CMD_CTL_FLUSH:
628 {
629 ih264d_ctl_flush_ip_t *ps_ip;
630 ih264d_ctl_flush_op_t *ps_op;
631 ps_ip = (ih264d_ctl_flush_ip_t *)pv_api_ip;
632 ps_op = (ih264d_ctl_flush_op_t *)pv_api_op;
633 if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
634 != sizeof(ih264d_ctl_flush_ip_t))
635 {
636 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
637 << IVD_UNSUPPORTEDPARAM;
638 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
639 IVD_IP_API_STRUCT_SIZE_INCORRECT;
640 return IV_FAIL;
641 }
642 if(ps_op->s_ivd_ctl_flush_op_t.u4_size
643 != sizeof(ih264d_ctl_flush_op_t))
644 {
645 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
646 << IVD_UNSUPPORTEDPARAM;
647 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
648 IVD_OP_API_STRUCT_SIZE_INCORRECT;
649 return IV_FAIL;
650 }
651 }
652 break;
653
654 case IVD_CMD_CTL_RESET:
655 {
656 ih264d_ctl_reset_ip_t *ps_ip;
657 ih264d_ctl_reset_op_t *ps_op;
658 ps_ip = (ih264d_ctl_reset_ip_t *)pv_api_ip;
659 ps_op = (ih264d_ctl_reset_op_t *)pv_api_op;
660 if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
661 != sizeof(ih264d_ctl_reset_ip_t))
662 {
663 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
664 << IVD_UNSUPPORTEDPARAM;
665 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
666 IVD_IP_API_STRUCT_SIZE_INCORRECT;
667 return IV_FAIL;
668 }
669 if(ps_op->s_ivd_ctl_reset_op_t.u4_size
670 != sizeof(ih264d_ctl_reset_op_t))
671 {
672 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
673 << IVD_UNSUPPORTEDPARAM;
674 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
675 IVD_OP_API_STRUCT_SIZE_INCORRECT;
676 return IV_FAIL;
677 }
678 }
679 break;
680
681 case IH264D_CMD_CTL_DEGRADE:
682 {
683 ih264d_ctl_degrade_ip_t *ps_ip;
684 ih264d_ctl_degrade_op_t *ps_op;
685
686 ps_ip = (ih264d_ctl_degrade_ip_t *)pv_api_ip;
687 ps_op = (ih264d_ctl_degrade_op_t *)pv_api_op;
688
689 if(ps_ip->u4_size != sizeof(ih264d_ctl_degrade_ip_t))
690 {
691 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
692 ps_op->u4_error_code |=
693 IVD_IP_API_STRUCT_SIZE_INCORRECT;
694 return IV_FAIL;
695 }
696
697 if(ps_op->u4_size != sizeof(ih264d_ctl_degrade_op_t))
698 {
699 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
700 ps_op->u4_error_code |=
701 IVD_OP_API_STRUCT_SIZE_INCORRECT;
702 return IV_FAIL;
703 }
704
705 if((ps_ip->i4_degrade_pics < 0)
706 || (ps_ip->i4_degrade_pics > 4)
707 || (ps_ip->i4_nondegrade_interval < 0)
708 || (ps_ip->i4_degrade_type < 0)
709 || (ps_ip->i4_degrade_type > 15))
710 {
711 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
712 return IV_FAIL;
713 }
714
715 break;
716 }
717
718 case IH264D_CMD_CTL_GET_BUFFER_DIMENSIONS:
719 {
720 ih264d_ctl_get_frame_dimensions_ip_t *ps_ip;
721 ih264d_ctl_get_frame_dimensions_op_t *ps_op;
722
723 ps_ip = (ih264d_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
724 ps_op = (ih264d_ctl_get_frame_dimensions_op_t *)pv_api_op;
725
726 if(ps_ip->u4_size
727 != sizeof(ih264d_ctl_get_frame_dimensions_ip_t))
728 {
729 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
730 ps_op->u4_error_code |=
731 IVD_IP_API_STRUCT_SIZE_INCORRECT;
732 return IV_FAIL;
733 }
734
735 if(ps_op->u4_size
736 != sizeof(ih264d_ctl_get_frame_dimensions_op_t))
737 {
738 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
739 ps_op->u4_error_code |=
740 IVD_OP_API_STRUCT_SIZE_INCORRECT;
741 return IV_FAIL;
742 }
743
744 break;
745 }
746
747 case IH264D_CMD_CTL_SET_NUM_CORES:
748 {
749 ih264d_ctl_set_num_cores_ip_t *ps_ip;
750 ih264d_ctl_set_num_cores_op_t *ps_op;
751
752 ps_ip = (ih264d_ctl_set_num_cores_ip_t *)pv_api_ip;
753 ps_op = (ih264d_ctl_set_num_cores_op_t *)pv_api_op;
754
755 if(ps_ip->u4_size != sizeof(ih264d_ctl_set_num_cores_ip_t))
756 {
757 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
758 ps_op->u4_error_code |=
759 IVD_IP_API_STRUCT_SIZE_INCORRECT;
760 return IV_FAIL;
761 }
762
763 if(ps_op->u4_size != sizeof(ih264d_ctl_set_num_cores_op_t))
764 {
765 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
766 ps_op->u4_error_code |=
767 IVD_OP_API_STRUCT_SIZE_INCORRECT;
768 return IV_FAIL;
769 }
770
771 if((ps_ip->u4_num_cores != 1) && (ps_ip->u4_num_cores != 2)
772 && (ps_ip->u4_num_cores != 3)
773 && (ps_ip->u4_num_cores != 4))
774 {
775 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
776 return IV_FAIL;
777 }
778 break;
779 }
780 case IH264D_CMD_CTL_SET_PROCESSOR:
781 {
782 ih264d_ctl_set_processor_ip_t *ps_ip;
783 ih264d_ctl_set_processor_op_t *ps_op;
784
785 ps_ip = (ih264d_ctl_set_processor_ip_t *)pv_api_ip;
786 ps_op = (ih264d_ctl_set_processor_op_t *)pv_api_op;
787
788 if(ps_ip->u4_size != sizeof(ih264d_ctl_set_processor_ip_t))
789 {
790 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
791 ps_op->u4_error_code |=
792 IVD_IP_API_STRUCT_SIZE_INCORRECT;
793 return IV_FAIL;
794 }
795
796 if(ps_op->u4_size != sizeof(ih264d_ctl_set_processor_op_t))
797 {
798 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
799 ps_op->u4_error_code |=
800 IVD_OP_API_STRUCT_SIZE_INCORRECT;
801 return IV_FAIL;
802 }
803
804 break;
805 }
806 default:
807 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
808 *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
809 return IV_FAIL;
810 break;
811 }
812 }
813 break;
814 }
815
816 return IV_SUCCESS;
817}
818
819
820/**
821 *******************************************************************************
822 *
823 * @brief
824 * Sets Processor type
825 *
826 * @par Description:
827 * Sets Processor type
828 *
829 * @param[in] ps_codec_obj
830 * Pointer to codec object at API level
831 *
832 * @param[in] pv_api_ip
833 * Pointer to input argument structure
834 *
835 * @param[out] pv_api_op
836 * Pointer to output argument structure
837 *
838 * @returns Status
839 *
840 * @remarks
841 *
842 *
843 *******************************************************************************
844 */
845
846WORD32 ih264d_set_processor(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
847{
848 ih264d_ctl_set_processor_ip_t *ps_ip;
849 ih264d_ctl_set_processor_op_t *ps_op;
850 dec_struct_t *ps_codec = (dec_struct_t *)dec_hdl->pv_codec_handle;
851
852 ps_ip = (ih264d_ctl_set_processor_ip_t *)pv_api_ip;
853 ps_op = (ih264d_ctl_set_processor_op_t *)pv_api_op;
854
855 ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
856 ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
857
858 ih264d_init_function_ptr(ps_codec);
859
860 ps_op->u4_error_code = 0;
861 return IV_SUCCESS;
862}
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530863
864
865/**************************************************************************
866 * \if Function name : ih264d_init_decoder \endif
867 *
868 *
869 * \brief
870 * Initializes the decoder
871 *
872 * \param apiVersion : Version of the api being used.
873 * \param errorHandlingMechanism : Mechanism to be used for errror handling.
874 * \param postFilteringType: Type of post filtering operation to be used.
875 * \param uc_outputFormat: Format of the decoded picture [default 4:2:0].
876 * \param uc_dispBufs: Number of Display Buffers.
877 * \param p_NALBufAPI: Pointer to NAL Buffer API.
878 * \param p_DispBufAPI: Pointer to Display Buffer API.
879 * \param ih264d_dec_mem_manager :Pointer to the function that will be called by decoder
880 * for memory allocation and freeing.
881 *
882 * \return
883 * 0 on Success and -1 on error
884 *
885 **************************************************************************
886 */
887void ih264d_init_decoder(void * ps_dec_params)
888{
889 dec_struct_t * ps_dec = (dec_struct_t *)ps_dec_params;
890 dec_slice_params_t *ps_cur_slice;
891 pocstruct_t *ps_prev_poc, *ps_cur_poc;
Harish Mahendrakar370bd862016-04-21 09:04:37 +0530892 WORD32 size;
893
894 size = sizeof(pred_info_t) * 2 * 32;
895 memset(ps_dec->ps_pred, 0 , size);
896
897 size = sizeof(disp_mgr_t);
898 memset(ps_dec->pv_disp_buf_mgr, 0 , size);
899
900 size = sizeof(buf_mgr_t) + ithread_get_mutex_lock_size();
901 memset(ps_dec->pv_pic_buf_mgr, 0, size);
902
903 size = sizeof(dec_err_status_t);
904 memset(ps_dec->ps_dec_err_status, 0, size);
905
906 size = sizeof(sei);
907 memset(ps_dec->ps_sei, 0, size);
908
909 size = sizeof(dpb_commands_t);
910 memset(ps_dec->ps_dpb_cmds, 0, size);
911
912 size = sizeof(dec_bit_stream_t);
913 memset(ps_dec->ps_bitstrm, 0, size);
914
915 size = sizeof(dec_slice_params_t);
916 memset(ps_dec->ps_cur_slice, 0, size);
917
918 size = MAX(sizeof(dec_seq_params_t), sizeof(dec_pic_params_t));
919 memset(ps_dec->pv_scratch_sps_pps, 0, size);
920
921 size = sizeof(ctxt_inc_mb_info_t);
922 memset(ps_dec->ps_left_mb_ctxt_info, 0, size);
923
924 size = (sizeof(neighbouradd_t) << 2);
925 memset(ps_dec->ps_left_mvpred_addr, 0 ,size);
926
927 size = sizeof(buf_mgr_t) + ithread_get_mutex_lock_size();
928 memset(ps_dec->pv_mv_buf_mgr, 0, size);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530929
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530930 /* Free any dynamic buffers that are allocated */
931 ih264d_free_dynamic_bufs(ps_dec);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530932
933 ps_cur_slice = ps_dec->ps_cur_slice;
934 ps_dec->init_done = 0;
935
936 ps_dec->u4_num_cores = 1;
937
938 ps_dec->u2_pic_ht = ps_dec->u2_pic_wd = 0;
939
940 ps_dec->u1_separate_parse = DEFAULT_SEPARATE_PARSE;
941 ps_dec->u4_app_disable_deblk_frm = 0;
942 ps_dec->i4_degrade_type = 0;
943 ps_dec->i4_degrade_pics = 0;
944
945 ps_dec->i4_app_skip_mode = IVD_SKIP_NONE;
946 ps_dec->i4_dec_skip_mode = IVD_SKIP_NONE;
947
948 memset(ps_dec->ps_pps, 0,
949 ((sizeof(dec_pic_params_t)) * MAX_NUM_PIC_PARAMS));
950 memset(ps_dec->ps_sps, 0,
951 ((sizeof(dec_seq_params_t)) * MAX_NUM_SEQ_PARAMS));
952
953 /* Initialization of function pointers ih264d_deblock_picture function*/
954
955 ps_dec->p_DeblockPicture[0] = ih264d_deblock_picture_non_mbaff;
956 ps_dec->p_DeblockPicture[1] = ih264d_deblock_picture_mbaff;
957
958 ps_dec->s_cab_dec_env.pv_codec_handle = ps_dec;
959
960 ps_dec->u4_num_fld_in_frm = 0;
961
962 ps_dec->ps_dpb_mgr->pv_codec_handle = ps_dec;
963
964 /* Initialize the sei validity u4_flag with zero indiacting sei is not valid*/
965 ps_dec->ps_sei->u1_is_valid = 0;
966
967 /* decParams Initializations */
968 ps_dec->ps_cur_pps = NULL;
969 ps_dec->ps_cur_sps = NULL;
970 ps_dec->u1_init_dec_flag = 0;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700971 ps_dec->u1_first_slice_in_stream = 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530972 ps_dec->u1_first_pb_nal_in_pic = 1;
973 ps_dec->u1_last_pic_not_decoded = 0;
974 ps_dec->u4_app_disp_width = 0;
975 ps_dec->i4_header_decoded = 0;
976 ps_dec->u4_total_frames_decoded = 0;
977
978 ps_dec->i4_error_code = 0;
979 ps_dec->i4_content_type = -1;
980 ps_dec->ps_cur_slice->u1_mbaff_frame_flag = 0;
981
982 ps_dec->ps_dec_err_status->u1_err_flag = ACCEPT_ALL_PICS; //REJECT_PB_PICS;
983 ps_dec->ps_dec_err_status->u1_cur_pic_type = PIC_TYPE_UNKNOWN;
984 ps_dec->ps_dec_err_status->u4_frm_sei_sync = SYNC_FRM_DEFAULT;
985 ps_dec->ps_dec_err_status->u4_cur_frm = INIT_FRAME;
986 ps_dec->ps_dec_err_status->u1_pic_aud_i = PIC_TYPE_UNKNOWN;
987
988 ps_dec->u1_pr_sl_type = 0xFF;
989 ps_dec->u2_mbx = 0xffff;
990 ps_dec->u2_mby = 0;
991 ps_dec->u2_total_mbs_coded = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530992
993 /* POC initializations */
994 ps_prev_poc = &ps_dec->s_prev_pic_poc;
995 ps_cur_poc = &ps_dec->s_cur_pic_poc;
996 ps_prev_poc->i4_pic_order_cnt_lsb = ps_cur_poc->i4_pic_order_cnt_lsb = 0;
997 ps_prev_poc->i4_pic_order_cnt_msb = ps_cur_poc->i4_pic_order_cnt_msb = 0;
998 ps_prev_poc->i4_delta_pic_order_cnt_bottom =
999 ps_cur_poc->i4_delta_pic_order_cnt_bottom = 0;
1000 ps_prev_poc->i4_delta_pic_order_cnt[0] =
1001 ps_cur_poc->i4_delta_pic_order_cnt[0] = 0;
1002 ps_prev_poc->i4_delta_pic_order_cnt[1] =
1003 ps_cur_poc->i4_delta_pic_order_cnt[1] = 0;
1004 ps_prev_poc->u1_mmco_equalto5 = ps_cur_poc->u1_mmco_equalto5 = 0;
1005 ps_prev_poc->i4_top_field_order_count = ps_cur_poc->i4_top_field_order_count =
1006 0;
1007 ps_prev_poc->i4_bottom_field_order_count =
1008 ps_cur_poc->i4_bottom_field_order_count = 0;
1009 ps_prev_poc->u1_bot_field = ps_cur_poc->u1_bot_field = 0;
1010 ps_prev_poc->u1_mmco_equalto5 = ps_cur_poc->u1_mmco_equalto5 = 0;
1011 ps_prev_poc->i4_prev_frame_num_ofst = ps_cur_poc->i4_prev_frame_num_ofst = 0;
1012 ps_cur_slice->u1_mmco_equalto5 = 0;
1013 ps_cur_slice->u2_frame_num = 0;
1014
1015 ps_dec->i4_max_poc = 0;
1016 ps_dec->i4_prev_max_display_seq = 0;
1017 ps_dec->u1_recon_mb_grp = 4;
1018
1019 /* Field PIC initializations */
1020 ps_dec->u1_second_field = 0;
1021 ps_dec->s_prev_seq_params.u1_eoseq_pending = 0;
1022
1023 /* Set the cropping parameters as zero */
1024 ps_dec->u2_crop_offset_y = 0;
1025 ps_dec->u2_crop_offset_uv = 0;
1026
1027 /* The Initial Frame Rate Info is not Present */
1028 ps_dec->i4_vui_frame_rate = -1;
1029 ps_dec->i4_pic_type = -1;
1030 ps_dec->i4_frametype = -1;
1031 ps_dec->i4_content_type = -1;
1032
1033 ps_dec->u1_res_changed = 0;
1034
1035
1036 ps_dec->u1_frame_decoded_flag = 0;
1037
1038 /* Set the default frame seek mask mode */
1039 ps_dec->u4_skip_frm_mask = SKIP_NONE;
1040
1041 /********************************************************/
1042 /* Initialize CAVLC residual decoding function pointers */
1043 /********************************************************/
1044 ps_dec->pf_cavlc_4x4res_block[0] = ih264d_cavlc_4x4res_block_totalcoeff_1;
1045 ps_dec->pf_cavlc_4x4res_block[1] =
1046 ih264d_cavlc_4x4res_block_totalcoeff_2to10;
1047 ps_dec->pf_cavlc_4x4res_block[2] =
1048 ih264d_cavlc_4x4res_block_totalcoeff_11to16;
1049
1050 ps_dec->pf_cavlc_parse4x4coeff[0] = ih264d_cavlc_parse4x4coeff_n0to7;
1051 ps_dec->pf_cavlc_parse4x4coeff[1] = ih264d_cavlc_parse4x4coeff_n8;
1052
1053 ps_dec->pf_cavlc_parse_8x8block[0] =
1054 ih264d_cavlc_parse_8x8block_none_available;
1055 ps_dec->pf_cavlc_parse_8x8block[1] =
1056 ih264d_cavlc_parse_8x8block_left_available;
1057 ps_dec->pf_cavlc_parse_8x8block[2] =
1058 ih264d_cavlc_parse_8x8block_top_available;
1059 ps_dec->pf_cavlc_parse_8x8block[3] =
1060 ih264d_cavlc_parse_8x8block_both_available;
1061
1062 /***************************************************************************/
1063 /* Initialize Bs calculation function pointers for P and B, 16x16/non16x16 */
1064 /***************************************************************************/
1065 ps_dec->pf_fill_bs1[0][0] = ih264d_fill_bs1_16x16mb_pslice;
1066 ps_dec->pf_fill_bs1[0][1] = ih264d_fill_bs1_non16x16mb_pslice;
1067
1068 ps_dec->pf_fill_bs1[1][0] = ih264d_fill_bs1_16x16mb_bslice;
1069 ps_dec->pf_fill_bs1[1][1] = ih264d_fill_bs1_non16x16mb_bslice;
1070
1071 ps_dec->pf_fill_bs_xtra_left_edge[0] =
1072 ih264d_fill_bs_xtra_left_edge_cur_frm;
1073 ps_dec->pf_fill_bs_xtra_left_edge[1] =
1074 ih264d_fill_bs_xtra_left_edge_cur_fld;
1075
1076 /* Initialize Reference Pic Buffers */
1077 ih264d_init_ref_bufs(ps_dec->ps_dpb_mgr);
1078
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301079 ps_dec->u2_prv_frame_num = 0;
1080 ps_dec->u1_top_bottom_decoded = 0;
1081 ps_dec->u1_dangling_field = 0;
1082
1083 ps_dec->s_cab_dec_env.cabac_table = gau4_ih264d_cabac_table;
1084
1085 ps_dec->pu1_left_mv_ctxt_inc = ps_dec->u1_left_mv_ctxt_inc_arr[0];
1086 ps_dec->pi1_left_ref_idx_ctxt_inc =
1087 &ps_dec->i1_left_ref_idx_ctx_inc_arr[0][0];
1088 ps_dec->pu1_left_yuv_dc_csbp = &ps_dec->u1_yuv_dc_csbp_topmb;
1089
1090 /* ! */
1091 /* Initializing flush frame u4_flag */
1092 ps_dec->u1_flushfrm = 0;
1093
1094 {
1095 ps_dec->s_cab_dec_env.pv_codec_handle = (void*)ps_dec;
1096 ps_dec->ps_bitstrm->pv_codec_handle = (void*)ps_dec;
1097 ps_dec->ps_cur_slice->pv_codec_handle = (void*)ps_dec;
1098 ps_dec->ps_dpb_mgr->pv_codec_handle = (void*)ps_dec;
1099 }
1100
1101 memset(ps_dec->disp_bufs, 0, (MAX_DISP_BUFS_NEW) * sizeof(disp_buf_t));
1102 memset(ps_dec->u4_disp_buf_mapping, 0,
1103 (MAX_DISP_BUFS_NEW) * sizeof(UWORD32));
1104 memset(ps_dec->u4_disp_buf_to_be_freed, 0,
1105 (MAX_DISP_BUFS_NEW) * sizeof(UWORD32));
Harish Mahendrakar2c9d67f2016-05-24 13:11:51 -07001106 memset(ps_dec->ps_cur_slice, 0, sizeof(dec_slice_params_t));
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301107
1108 ih264d_init_arch(ps_dec);
1109 ih264d_init_function_ptr(ps_dec);
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301110 ps_dec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301111 ps_dec->init_done = 1;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07001112
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301113}
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301114WORD32 ih264d_free_static_bufs(iv_obj_t *dec_hdl)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301115{
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301116 dec_struct_t *ps_dec;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301117
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301118 void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1119 void *pv_mem_ctxt;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301120
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301121 ps_dec = (dec_struct_t *)dec_hdl->pv_codec_handle;
1122 pf_aligned_free = ps_dec->pf_aligned_free;
1123 pv_mem_ctxt = ps_dec->pv_mem_ctxt;
1124
1125 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_sps);
1126 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_pps);
1127 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_dec_thread_handle);
1128 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_bs_deblk_thread_handle);
1129 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_dpb_mgr);
1130 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_pred);
1131 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_disp_buf_mgr);
1132 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_pic_buf_mgr);
1133 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_pic_buf_base);
1134 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_dec_err_status);
1135 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_sei);
1136 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_dpb_cmds);
1137 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_bitstrm);
1138 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_cur_slice);
1139 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_scratch_sps_pps);
1140 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_bits_buf_static);
1141 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ppv_map_ref_idx_to_poc_base);
1142 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->p_cabac_ctxt_table_t);
1143 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_left_mb_ctxt_info);
1144 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_ref_buff_base);
1145 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pi2_pred1);
1146 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_temp_mc_buffer);
1147 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_init_dpb_base);
1148 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu4_mbaff_wt_mat);
1149 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu4_wts_ofsts_mat);
1150 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_left_mvpred_addr);
1151 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_mv_buf_mgr);
1152 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_col_mv_base);
1153 PS_DEC_ALIGNED_FREE(ps_dec, dec_hdl->pv_codec_handle);
1154
1155 if(dec_hdl)
1156 {
1157 pf_aligned_free(pv_mem_ctxt, dec_hdl);
1158 }
1159 return IV_SUCCESS;
1160}
1161/*****************************************************************************/
1162/* */
1163/* Function Name : ih264d_create */
1164/* */
1165/* Description : creates decoder */
1166/* */
1167/* Inputs :iv_obj_t decoder handle */
1168/* :pv_api_ip pointer to input structure */
1169/* :pv_api_op pointer to output structure */
1170/* Outputs : */
1171/* Returns : void */
1172/* */
1173/* Issues : none */
1174/* */
1175/* Revision History: */
1176/* */
1177/* DD MM YYYY Author(s) Changes (Describe the changes made) */
1178/* 22 10 2008 100356 Draft */
1179/* */
1180/*****************************************************************************/
1181WORD32 ih264d_allocate_static_bufs(iv_obj_t **dec_hdl, void *pv_api_ip, void *pv_api_op)
1182{
1183 ih264d_create_ip_t *ps_create_ip;
1184 ih264d_create_op_t *ps_create_op;
1185 void *pv_buf;
1186 UWORD8 *pu1_buf;
1187 dec_struct_t *ps_dec;
1188 void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1189 void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1190 void *pv_mem_ctxt;
1191 WORD32 size;
1192
1193 ps_create_ip = (ih264d_create_ip_t *)pv_api_ip;
1194 ps_create_op = (ih264d_create_op_t *)pv_api_op;
1195
1196 ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
1197
1198 pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1199 pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1200 pv_mem_ctxt = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1201
1202 /* Initialize return handle to NULL */
1203 ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1204 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1205 RETURN_IF((NULL == pv_buf), IV_FAIL);
1206 *dec_hdl = (iv_obj_t *)pv_buf;
1207 ps_create_op->s_ivd_create_op_t.pv_handle = *dec_hdl;
1208
1209 (*dec_hdl)->pv_codec_handle = NULL;
1210 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(dec_struct_t));
1211 RETURN_IF((NULL == pv_buf), IV_FAIL);
1212 (*dec_hdl)->pv_codec_handle = (dec_struct_t *)pv_buf;
1213 ps_dec = (dec_struct_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301214
1215 memset(ps_dec, 0, sizeof(dec_struct_t));
1216
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301217#ifndef LOGO_EN
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301218 ps_dec->u4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301219#else
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301220 ps_dec->u4_share_disp_buf = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301221#endif
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301222
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301223 ps_dec->u1_chroma_format =
1224 (UWORD8)(ps_create_ip->s_ivd_create_ip_t.e_output_format);
1225
1226 if((ps_dec->u1_chroma_format != IV_YUV_420P)
1227 && (ps_dec->u1_chroma_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301228 != IV_YUV_420SP_UV)
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301229 && (ps_dec->u1_chroma_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301230 != IV_YUV_420SP_VU))
1231 {
1232 ps_dec->u4_share_disp_buf = 0;
1233 }
1234
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301235 ps_dec->pf_aligned_alloc = pf_aligned_alloc;
1236 ps_dec->pf_aligned_free = pf_aligned_free;
1237 ps_dec->pv_mem_ctxt = pv_mem_ctxt;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301238
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301239
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301240 size = ((sizeof(dec_seq_params_t)) * MAX_NUM_SEQ_PARAMS);
1241 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1242 RETURN_IF((NULL == pv_buf), IV_FAIL);
1243 ps_dec->ps_sps = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301244
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301245 size = (sizeof(dec_pic_params_t)) * MAX_NUM_PIC_PARAMS;
1246 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1247 RETURN_IF((NULL == pv_buf), IV_FAIL);
1248 ps_dec->ps_pps = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301249
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301250 size = ithread_get_handle_size();
1251 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1252 RETURN_IF((NULL == pv_buf), IV_FAIL);
1253 ps_dec->pv_dec_thread_handle = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301254
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301255 size = ithread_get_handle_size();
1256 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1257 RETURN_IF((NULL == pv_buf), IV_FAIL);
1258 ps_dec->pv_bs_deblk_thread_handle = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301259
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301260 size = sizeof(dpb_manager_t);
1261 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1262 RETURN_IF((NULL == pv_buf), IV_FAIL);
1263 ps_dec->ps_dpb_mgr = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301264
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301265 size = sizeof(pred_info_t) * 2 * 32;
1266 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1267 RETURN_IF((NULL == pv_buf), IV_FAIL);
1268 ps_dec->ps_pred = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301269
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301270 size = sizeof(disp_mgr_t);
1271 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1272 RETURN_IF((NULL == pv_buf), IV_FAIL);
1273 ps_dec->pv_disp_buf_mgr = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301274
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301275 size = sizeof(buf_mgr_t) + ithread_get_mutex_lock_size();
1276 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1277 RETURN_IF((NULL == pv_buf), IV_FAIL);
1278 ps_dec->pv_pic_buf_mgr = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301279
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301280 size = sizeof(struct pic_buffer_t) * (H264_MAX_REF_PICS * 2);
1281 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1282 RETURN_IF((NULL == pv_buf), IV_FAIL);
1283 ps_dec->ps_pic_buf_base = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301284
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301285 size = sizeof(dec_err_status_t);
1286 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1287 RETURN_IF((NULL == pv_buf), IV_FAIL);
1288 ps_dec->ps_dec_err_status = (dec_err_status_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301289
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301290 size = sizeof(sei);
1291 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1292 RETURN_IF((NULL == pv_buf), IV_FAIL);
1293 ps_dec->ps_sei = (sei *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301294
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301295 size = sizeof(dpb_commands_t);
1296 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1297 RETURN_IF((NULL == pv_buf), IV_FAIL);
1298 ps_dec->ps_dpb_cmds = (dpb_commands_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301299
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301300 size = sizeof(dec_bit_stream_t);
1301 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1302 RETURN_IF((NULL == pv_buf), IV_FAIL);
1303 ps_dec->ps_bitstrm = (dec_bit_stream_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301304
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301305 size = sizeof(dec_slice_params_t);
1306 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1307 RETURN_IF((NULL == pv_buf), IV_FAIL);
1308 ps_dec->ps_cur_slice = (dec_slice_params_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301309
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301310 size = MAX(sizeof(dec_seq_params_t), sizeof(dec_pic_params_t));
1311 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1312 RETURN_IF((NULL == pv_buf), IV_FAIL);
1313 ps_dec->pv_scratch_sps_pps = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301314
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301315
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301316 ps_dec->u4_static_bits_buf_size = 256000;
1317 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, ps_dec->u4_static_bits_buf_size);
1318 RETURN_IF((NULL == pv_buf), IV_FAIL);
1319 ps_dec->pu1_bits_buf_static = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301320
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301321
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301322 size = ((TOTAL_LIST_ENTRIES + PAD_MAP_IDX_POC)
1323 * sizeof(void *));
1324 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1325 RETURN_IF((NULL == pv_buf), IV_FAIL);
1326 ps_dec->ppv_map_ref_idx_to_poc_base = pv_buf;
1327 memset(ps_dec->ppv_map_ref_idx_to_poc_base, 0, size);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301328
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301329 ps_dec->ppv_map_ref_idx_to_poc = ps_dec->ppv_map_ref_idx_to_poc_base + OFFSET_MAP_IDX_POC;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301330
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301331
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301332 size = (sizeof(bin_ctxt_model_t) * NUM_CABAC_CTXTS);
1333 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1334 RETURN_IF((NULL == pv_buf), IV_FAIL);
1335 ps_dec->p_cabac_ctxt_table_t = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301336
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301337
1338
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301339 size = sizeof(ctxt_inc_mb_info_t);
1340 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1341 RETURN_IF((NULL == pv_buf), IV_FAIL);
1342 ps_dec->ps_left_mb_ctxt_info = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301343
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301344
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301345
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301346 size = MAX_REF_BUF_SIZE * 2;
1347 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1348 RETURN_IF((NULL == pv_buf), IV_FAIL);
1349 ps_dec->pu1_ref_buff_base = pv_buf;
1350 ps_dec->pu1_ref_buff = ps_dec->pu1_ref_buff_base + MAX_REF_BUF_SIZE;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301351
1352
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301353 size = ((sizeof(WORD16)) * PRED_BUFFER_WIDTH
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07001354 * PRED_BUFFER_HEIGHT * 2);
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301355 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1356 RETURN_IF((NULL == pv_buf), IV_FAIL);
1357 ps_dec->pi2_pred1 = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301358
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301359
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301360 size = sizeof(UWORD8) * (MB_LUM_SIZE);
1361 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1362 RETURN_IF((NULL == pv_buf), IV_FAIL);
1363 ps_dec->pu1_temp_mc_buffer = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301364
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301365
1366
1367
1368 size = 8 * MAX_REF_BUFS * sizeof(struct pic_buffer_t);
1369 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1370 RETURN_IF((NULL == pv_buf), IV_FAIL);
1371
1372 ps_dec->pu1_init_dpb_base = pv_buf;
1373 pu1_buf = pv_buf;
1374 ps_dec->ps_dpb_mgr->ps_init_dpb[0][0] = (struct pic_buffer_t *)pu1_buf;
1375
1376 pu1_buf += size / 2;
1377 ps_dec->ps_dpb_mgr->ps_init_dpb[1][0] = (struct pic_buffer_t *)pu1_buf;
1378
1379 size = (sizeof(UWORD32) * 3
1380 * (MAX_FRAMES * MAX_FRAMES))
1381 << 3;
1382 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1383 RETURN_IF((NULL == pv_buf), IV_FAIL);
1384 ps_dec->pu4_mbaff_wt_mat = pv_buf;
1385
1386 size = sizeof(UWORD32) * 2 * 3
Harish Mahendrakarbee9b9a2017-01-13 11:26:23 +05301387 * ((MAX_FRAMES << 1) * (MAX_FRAMES << 1));
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301388 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1389 RETURN_IF((NULL == pv_buf), IV_FAIL);
1390 ps_dec->pu4_wts_ofsts_mat = pv_buf;
1391
1392
1393 size = (sizeof(neighbouradd_t) << 2);
1394 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1395 RETURN_IF((NULL == pv_buf), IV_FAIL);
1396 ps_dec->ps_left_mvpred_addr = pv_buf;
1397
1398
1399 size = sizeof(buf_mgr_t) + ithread_get_mutex_lock_size();
1400 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1401 RETURN_IF((NULL == pv_buf), IV_FAIL);
1402 ps_dec->pv_mv_buf_mgr = pv_buf;
1403
1404
1405 size = sizeof(col_mv_buf_t) * (H264_MAX_REF_PICS * 2);
1406 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1407 RETURN_IF((NULL == pv_buf), IV_FAIL);
1408 ps_dec->ps_col_mv_base = pv_buf;
1409 memset(ps_dec->ps_col_mv_base, 0, size);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301410
1411 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301412 UWORD8 i;
1413 struct pic_buffer_t *ps_init_dpb;
1414 ps_init_dpb = ps_dec->ps_dpb_mgr->ps_init_dpb[0][0];
1415 for(i = 0; i < 2 * MAX_REF_BUFS; i++)
1416 {
1417 ps_init_dpb->pu1_buf1 = NULL;
1418 ps_init_dpb->u1_long_term_frm_idx = MAX_REF_BUFS + 1;
1419 ps_dec->ps_dpb_mgr->ps_init_dpb[0][i] = ps_init_dpb;
1420 ps_dec->ps_dpb_mgr->ps_mod_dpb[0][i] = ps_init_dpb;
1421 ps_init_dpb++;
1422 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301423
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301424 ps_init_dpb = ps_dec->ps_dpb_mgr->ps_init_dpb[1][0];
1425 for(i = 0; i < 2 * MAX_REF_BUFS; i++)
1426 {
1427 ps_init_dpb->pu1_buf1 = NULL;
1428 ps_init_dpb->u1_long_term_frm_idx = MAX_REF_BUFS + 1;
1429 ps_dec->ps_dpb_mgr->ps_init_dpb[1][i] = ps_init_dpb;
1430 ps_dec->ps_dpb_mgr->ps_mod_dpb[1][i] = ps_init_dpb;
1431 ps_init_dpb++;
1432 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301433 }
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301434 ih264d_init_decoder(ps_dec);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301435
1436 return IV_SUCCESS;
1437}
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301438
1439
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301440/*****************************************************************************/
1441/* */
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301442/* Function Name : ih264d_create */
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301443/* */
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301444/* Description : creates decoder */
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301445/* */
1446/* Inputs :iv_obj_t decoder handle */
1447/* :pv_api_ip pointer to input structure */
1448/* :pv_api_op pointer to output structure */
1449/* Outputs : */
1450/* Returns : void */
1451/* */
1452/* Issues : none */
1453/* */
1454/* Revision History: */
1455/* */
1456/* DD MM YYYY Author(s) Changes (Describe the changes made) */
1457/* 22 10 2008 100356 Draft */
1458/* */
1459/*****************************************************************************/
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301460WORD32 ih264d_create(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301461{
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301462 ih264d_create_op_t *ps_create_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301463
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301464 WORD32 ret;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301465
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301466 ps_create_op = (ih264d_create_op_t *)pv_api_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301467
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301468 ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
1469
1470 ret = ih264d_allocate_static_bufs(&dec_hdl, pv_api_ip, pv_api_op);
1471
1472 /* If allocation of some buffer fails, then free buffers allocated till then */
1473 if((IV_FAIL == ret) && (NULL != dec_hdl))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301474 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301475 ih264d_free_static_bufs(dec_hdl);
1476 ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
1477 ps_create_op->s_ivd_create_op_t.u4_error_code = 1 << IVD_FATALERROR;
1478
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301479 return IV_FAIL;
1480 }
1481
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301482 return IV_SUCCESS;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301483}
1484
1485/*****************************************************************************/
1486/* */
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301487/* Function Name : ih264d_map_error */
1488/* */
1489/* Description : Maps error codes to IVD error groups */
1490/* */
1491/* Inputs : */
1492/* Globals : <Does it use any global variables?> */
1493/* Outputs : */
1494/* Returns : void */
1495/* */
1496/* Issues : none */
1497/* */
1498/* Revision History: */
1499/* */
1500/* DD MM YYYY Author(s) Changes (Describe the changes made) */
1501/* 22 10 2008 100356 Draft */
1502/* */
1503/*****************************************************************************/
1504UWORD32 ih264d_map_error(UWORD32 i4_err_status)
1505{
1506 UWORD32 temp = 0;
1507
1508 switch(i4_err_status)
1509 {
1510 case ERROR_MEM_ALLOC_ISRAM_T:
1511 case ERROR_MEM_ALLOC_SDRAM_T:
1512 case ERROR_BUF_MGR:
1513 case ERROR_MB_GROUP_ASSGN_T:
1514 case ERROR_FRAME_LIMIT_OVER:
1515 case ERROR_ACTUAL_RESOLUTION_GREATER_THAN_INIT:
1516 case ERROR_PROFILE_NOT_SUPPORTED:
1517 case ERROR_INIT_NOT_DONE:
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301518 case IVD_MEM_ALLOC_FAILED:
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301519 temp = 1 << IVD_FATALERROR;
1520 H264_DEC_DEBUG_PRINT("\nFatal Error\n");
1521 break;
1522
1523 case ERROR_DBP_MANAGER_T:
1524 case ERROR_GAPS_IN_FRM_NUM:
1525 case ERROR_UNKNOWN_NAL:
1526 case ERROR_INV_MB_SLC_GRP_T:
1527 case ERROR_MULTIPLE_SLC_GRP_T:
1528 case ERROR_UNKNOWN_LEVEL:
1529 case ERROR_UNAVAIL_PICBUF_T:
1530 case ERROR_UNAVAIL_MVBUF_T:
1531 case ERROR_UNAVAIL_DISPBUF_T:
1532 case ERROR_NUM_REF:
1533 case ERROR_REFIDX_ORDER_T:
1534 case ERROR_PIC0_NOT_FOUND_T:
1535 case ERROR_MB_TYPE:
1536 case ERROR_SUB_MB_TYPE:
1537 case ERROR_CBP:
1538 case ERROR_REF_IDX:
1539 case ERROR_NUM_MV:
1540 case ERROR_CHROMA_PRED_MODE:
1541 case ERROR_INTRAPRED:
1542 case ERROR_NEXT_MB_ADDRESS_T:
1543 case ERROR_MB_ADDRESS_T:
1544 case ERROR_PIC1_NOT_FOUND_T:
1545 case ERROR_CAVLC_NUM_COEFF_T:
1546 case ERROR_CAVLC_SCAN_POS_T:
1547 case ERROR_PRED_WEIGHT_TABLE_T:
1548 case ERROR_CORRUPTED_SLICE:
1549 temp = 1 << IVD_CORRUPTEDDATA;
1550 break;
1551
1552 case ERROR_NOT_SUPP_RESOLUTION:
1553 case ERROR_FEATURE_UNAVAIL:
1554 case ERROR_ACTUAL_LEVEL_GREATER_THAN_INIT:
1555 temp = 1 << IVD_UNSUPPORTEDINPUT;
1556 break;
1557
1558 case ERROR_INVALID_PIC_PARAM:
1559 case ERROR_INVALID_SEQ_PARAM:
1560 case ERROR_EGC_EXCEED_32_1_T:
1561 case ERROR_EGC_EXCEED_32_2_T:
1562 case ERROR_INV_RANGE_TEV_T:
1563 case ERROR_INV_SLC_TYPE_T:
1564 case ERROR_INV_POC_TYPE_T:
1565 case ERROR_INV_RANGE_QP_T:
1566 case ERROR_INV_SPS_PPS_T:
1567 case ERROR_INV_SLICE_HDR_T:
1568 temp = 1 << IVD_CORRUPTEDHEADER;
1569 break;
1570
1571 case ERROR_EOB_FLUSHBITS_T:
1572 case ERROR_EOB_GETBITS_T:
1573 case ERROR_EOB_GETBIT_T:
1574 case ERROR_EOB_BYPASS_T:
1575 case ERROR_EOB_DECISION_T:
1576 case ERROR_EOB_TERMINATE_T:
1577 case ERROR_EOB_READCOEFF4X4CAB_T:
1578 temp = 1 << IVD_INSUFFICIENTDATA;
1579 break;
1580 case ERROR_DYNAMIC_RESOLUTION_NOT_SUPPORTED:
1581 case ERROR_DISP_WIDTH_RESET_TO_PIC_WIDTH:
1582 temp = 1 << IVD_UNSUPPORTEDPARAM | 1 << IVD_FATALERROR;
1583 break;
1584
1585 case ERROR_DANGLING_FIELD_IN_PIC:
1586 temp = 1 << IVD_APPLIEDCONCEALMENT;
1587 break;
1588
1589 }
1590
1591 return temp;
1592
1593}
1594
1595/*****************************************************************************/
1596/* */
1597/* Function Name : ih264d_video_decode */
1598/* */
1599/* Description : handle video decode API command */
1600/* */
1601/* Inputs :iv_obj_t decoder handle */
1602/* :pv_api_ip pointer to input structure */
1603/* :pv_api_op pointer to output structure */
1604/* Outputs : */
1605/* Returns : void */
1606/* */
1607/* Issues : none */
1608/* */
1609/* Revision History: */
1610/* */
1611/* DD MM YYYY Author(s) Changes (Describe the changes made) */
1612/* 22 10 2008 100356 Draft */
1613/* */
1614/*****************************************************************************/
1615
1616WORD32 ih264d_video_decode(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
1617{
1618 /* ! */
1619
1620 dec_struct_t * ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
1621
1622 WORD32 i4_err_status = 0;
1623 UWORD8 *pu1_buf = NULL;
1624 WORD32 buflen;
1625 UWORD32 u4_max_ofst, u4_length_of_start_code = 0;
1626
1627 UWORD32 bytes_consumed = 0;
1628 UWORD32 cur_slice_is_nonref = 0;
1629 UWORD32 u4_next_is_aud;
1630 UWORD32 u4_first_start_code_found = 0;
Hamsalekha Se789d1d2015-07-10 13:41:00 +05301631 WORD32 ret = 0,api_ret_value = IV_SUCCESS;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301632 WORD32 header_data_left = 0,frame_data_left = 0;
1633 UWORD8 *pu1_bitstrm_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301634 ivd_video_decode_ip_t *ps_dec_ip;
1635 ivd_video_decode_op_t *ps_dec_op;
Martin Storsjo086dd8e2015-06-13 00:35:01 +03001636
1637 ithread_set_name((void*)"Parse_thread");
1638
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301639 ps_dec_ip = (ivd_video_decode_ip_t *)pv_api_ip;
1640 ps_dec_op = (ivd_video_decode_op_t *)pv_api_op;
Harish Mahendrakar33db7a02016-04-20 16:13:52 +05301641
1642 {
1643 UWORD32 u4_size;
1644 u4_size = ps_dec_op->u4_size;
1645 memset(ps_dec_op, 0, sizeof(ivd_video_decode_op_t));
1646 ps_dec_op->u4_size = u4_size;
1647 }
1648
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301649 ps_dec->pv_dec_out = ps_dec_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301650 if(ps_dec->init_done != 1)
1651 {
1652 return IV_FAIL;
1653 }
1654
1655 /*Data memory barries instruction,so that bitstream write by the application is complete*/
1656 DATA_SYNC();
1657
1658 if(0 == ps_dec->u1_flushfrm)
1659 {
1660 if(ps_dec_ip->pv_stream_buffer == NULL)
1661 {
1662 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
1663 ps_dec_op->u4_error_code |= IVD_DEC_FRM_BS_BUF_NULL;
1664 return IV_FAIL;
1665 }
1666 if(ps_dec_ip->u4_num_Bytes <= 0)
1667 {
1668 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
1669 ps_dec_op->u4_error_code |= IVD_DEC_NUMBYTES_INV;
1670 return IV_FAIL;
1671
1672 }
1673 }
1674 ps_dec->u1_pic_decode_done = 0;
1675
1676 ps_dec_op->u4_num_bytes_consumed = 0;
1677
1678 ps_dec->ps_out_buffer = NULL;
1679
1680 if(ps_dec_ip->u4_size
1681 >= offsetof(ivd_video_decode_ip_t, s_out_buffer))
1682 ps_dec->ps_out_buffer = &ps_dec_ip->s_out_buffer;
1683
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301684 ps_dec->u4_fmt_conv_cur_row = 0;
1685
1686 ps_dec->u4_output_present = 0;
1687 ps_dec->s_disp_op.u4_error_code = 1;
1688 ps_dec->u4_fmt_conv_num_rows = FMT_CONV_NUM_ROWS;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07001689 if(0 == ps_dec->u4_share_disp_buf
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301690 && ps_dec->i4_decode_header == 0)
1691 {
1692 UWORD32 i;
1693 if(ps_dec->ps_out_buffer->u4_num_bufs == 0)
1694 {
1695 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
1696 ps_dec_op->u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS;
1697 return IV_FAIL;
1698 }
1699
1700 for(i = 0; i < ps_dec->ps_out_buffer->u4_num_bufs; i++)
1701 {
1702 if(ps_dec->ps_out_buffer->pu1_bufs[i] == NULL)
1703 {
1704 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
1705 ps_dec_op->u4_error_code |= IVD_DISP_FRM_OP_BUF_NULL;
1706 return IV_FAIL;
1707 }
1708
1709 if(ps_dec->ps_out_buffer->u4_min_out_buf_size[i] == 0)
1710 {
1711 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
1712 ps_dec_op->u4_error_code |=
1713 IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
1714 return IV_FAIL;
1715 }
1716 }
1717 }
1718
1719 if(ps_dec->u4_total_frames_decoded >= NUM_FRAMES_LIMIT)
1720 {
1721 ps_dec_op->u4_error_code = ERROR_FRAME_LIMIT_OVER;
1722 return IV_FAIL;
1723 }
1724
1725 /* ! */
1726 ps_dec->u4_ts = ps_dec_ip->u4_ts;
1727
1728 ps_dec_op->u4_error_code = 0;
1729 ps_dec_op->e_pic_type = -1;
1730 ps_dec_op->u4_output_present = 0;
1731 ps_dec_op->u4_frame_decoded_flag = 0;
1732
1733 ps_dec->i4_frametype = -1;
1734 ps_dec->i4_content_type = -1;
1735 /*
1736 * For field pictures, set the bottom and top picture decoded u4_flag correctly.
1737 */
1738 {
1739 if((TOP_FIELD_ONLY | BOT_FIELD_ONLY) == ps_dec->u1_top_bottom_decoded)
1740 {
1741 ps_dec->u1_top_bottom_decoded = 0;
1742 }
1743 }
1744 ps_dec->u4_slice_start_code_found = 0;
1745
1746 /* In case the deocder is not in flush mode(in shared mode),
1747 then decoder has to pick up a buffer to write current frame.
1748 Check if a frame is available in such cases */
1749
1750 if(ps_dec->u1_init_dec_flag == 1 && ps_dec->u4_share_disp_buf == 1
1751 && ps_dec->u1_flushfrm == 0)
1752 {
1753 UWORD32 i;
1754
1755 WORD32 disp_avail = 0, free_id;
1756
1757 /* Check if at least one buffer is available with the codec */
1758 /* If not then return to application with error */
1759 for(i = 0; i < ps_dec->u1_pic_bufs; i++)
1760 {
1761 if(0 == ps_dec->u4_disp_buf_mapping[i]
1762 || 1 == ps_dec->u4_disp_buf_to_be_freed[i])
1763 {
1764 disp_avail = 1;
1765 break;
1766 }
1767
1768 }
1769
1770 if(0 == disp_avail)
1771 {
1772 /* If something is queued for display wait for that buffer to be returned */
1773
1774 ps_dec_op->u4_error_code = IVD_DEC_REF_BUF_NULL;
1775 ps_dec_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
1776 return (IV_FAIL);
1777 }
1778
1779 while(1)
1780 {
1781 pic_buffer_t *ps_pic_buf;
1782 ps_pic_buf = (pic_buffer_t *)ih264_buf_mgr_get_next_free(
1783 (buf_mgr_t *)ps_dec->pv_pic_buf_mgr, &free_id);
1784
1785 if(ps_pic_buf == NULL)
1786 {
1787 UWORD32 i, display_queued = 0;
1788
1789 /* check if any buffer was given for display which is not returned yet */
1790 for(i = 0; i < (MAX_DISP_BUFS_NEW); i++)
1791 {
1792 if(0 != ps_dec->u4_disp_buf_mapping[i])
1793 {
1794 display_queued = 1;
1795 break;
1796 }
1797 }
1798 /* If some buffer is queued for display, then codec has to singal an error and wait
1799 for that buffer to be returned.
1800 If nothing is queued for display then codec has ownership of all display buffers
1801 and it can reuse any of the existing buffers and continue decoding */
1802
1803 if(1 == display_queued)
1804 {
1805 /* If something is queued for display wait for that buffer to be returned */
1806 ps_dec_op->u4_error_code = IVD_DEC_REF_BUF_NULL;
1807 ps_dec_op->u4_error_code |= (1
1808 << IVD_UNSUPPORTEDPARAM);
1809 return (IV_FAIL);
1810 }
1811 }
1812 else
1813 {
1814 /* If the buffer is with display, then mark it as in use and then look for a buffer again */
1815 if(1 == ps_dec->u4_disp_buf_mapping[free_id])
1816 {
1817 ih264_buf_mgr_set_status(
1818 (buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
1819 free_id,
1820 BUF_MGR_IO);
1821 }
1822 else
1823 {
1824 /**
1825 * Found a free buffer for present call. Release it now.
1826 * Will be again obtained later.
1827 */
1828 ih264_buf_mgr_release((buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
1829 free_id,
1830 BUF_MGR_IO);
1831 break;
1832 }
1833 }
1834 }
1835
1836 }
1837
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07001838 if(ps_dec->u1_flushfrm && ps_dec->u1_init_dec_flag)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301839 {
1840
1841 ih264d_get_next_display_field(ps_dec, ps_dec->ps_out_buffer,
1842 &(ps_dec->s_disp_op));
1843 if(0 == ps_dec->s_disp_op.u4_error_code)
1844 {
1845 ps_dec->u4_fmt_conv_cur_row = 0;
1846 ps_dec->u4_fmt_conv_num_rows = ps_dec->s_disp_frame_info.u4_y_ht;
1847 ih264d_format_convert(ps_dec, &(ps_dec->s_disp_op),
1848 ps_dec->u4_fmt_conv_cur_row,
1849 ps_dec->u4_fmt_conv_num_rows);
1850 ps_dec->u4_fmt_conv_cur_row += ps_dec->u4_fmt_conv_num_rows;
1851 ps_dec->u4_output_present = 1;
1852
1853 }
1854 ih264d_release_display_field(ps_dec, &(ps_dec->s_disp_op));
1855
1856 ps_dec_op->u4_pic_wd = (UWORD32)ps_dec->u2_disp_width;
1857 ps_dec_op->u4_pic_ht = (UWORD32)ps_dec->u2_disp_height;
1858
1859 ps_dec_op->u4_new_seq = 0;
1860
1861 ps_dec_op->u4_output_present = ps_dec->u4_output_present;
1862 ps_dec_op->u4_progressive_frame_flag =
1863 ps_dec->s_disp_op.u4_progressive_frame_flag;
1864 ps_dec_op->e_output_format =
1865 ps_dec->s_disp_op.e_output_format;
1866 ps_dec_op->s_disp_frm_buf = ps_dec->s_disp_op.s_disp_frm_buf;
1867 ps_dec_op->e4_fld_type = ps_dec->s_disp_op.e4_fld_type;
1868 ps_dec_op->u4_ts = ps_dec->s_disp_op.u4_ts;
1869 ps_dec_op->u4_disp_buf_id = ps_dec->s_disp_op.u4_disp_buf_id;
1870
1871 /*In the case of flush ,since no frame is decoded set pic type as invalid*/
1872 ps_dec_op->u4_is_ref_flag = -1;
1873 ps_dec_op->e_pic_type = IV_NA_FRAME;
1874 ps_dec_op->u4_frame_decoded_flag = 0;
1875
1876 if(0 == ps_dec->s_disp_op.u4_error_code)
1877 {
1878 return (IV_SUCCESS);
1879 }
1880 else
1881 return (IV_FAIL);
1882
1883 }
1884 if(ps_dec->u1_res_changed == 1)
1885 {
1886 /*if resolution has changed and all buffers have been flushed, reset decoder*/
1887 ih264d_init_decoder(ps_dec);
1888 }
1889
1890 ps_dec->u4_prev_nal_skipped = 0;
1891
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301892 ps_dec->u2_cur_mb_addr = 0;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07001893 ps_dec->u2_total_mbs_coded = 0;
1894 ps_dec->u2_cur_slice_num = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301895 ps_dec->cur_dec_mb_num = 0;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07001896 ps_dec->cur_recon_mb_num = 0;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05301897 ps_dec->u4_first_slice_in_pic = 2;
Harish Mahendrakar7a544682016-06-13 11:58:50 +05301898 ps_dec->u1_first_pb_nal_in_pic = 1;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07001899 ps_dec->u1_slice_header_done = 0;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05301900 ps_dec->u1_dangling_field = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301901
1902 ps_dec->u4_dec_thread_created = 0;
1903 ps_dec->u4_bs_deblk_thread_created = 0;
1904 ps_dec->u4_cur_bs_mb_num = 0;
Harish Mahendrakar5e4f64c2016-06-01 13:31:45 +05301905 ps_dec->u4_start_recon_deblk = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301906
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301907 DEBUG_THREADS_PRINTF(" Starting process call\n");
1908
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301909
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301910 ps_dec->u4_pic_buf_got = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301911
1912 do
1913 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301914 WORD32 buf_size;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301915
1916 pu1_buf = (UWORD8*)ps_dec_ip->pv_stream_buffer
1917 + ps_dec_op->u4_num_bytes_consumed;
1918
1919 u4_max_ofst = ps_dec_ip->u4_num_Bytes
1920 - ps_dec_op->u4_num_bytes_consumed;
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301921
1922 /* If dynamic bitstream buffer is not allocated and
1923 * header decode is done, then allocate dynamic bitstream buffer
1924 */
1925 if((NULL == ps_dec->pu1_bits_buf_dynamic) &&
1926 (ps_dec->i4_header_decoded & 1))
1927 {
1928 WORD32 size;
1929
1930 void *pv_buf;
1931 void *pv_mem_ctxt = ps_dec->pv_mem_ctxt;
1932 size = MAX(256000, ps_dec->u2_pic_wd * ps_dec->u2_pic_ht * 3 / 2);
1933 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1934 RETURN_IF((NULL == pv_buf), IV_FAIL);
1935 ps_dec->pu1_bits_buf_dynamic = pv_buf;
1936 ps_dec->u4_dynamic_bits_buf_size = size;
1937 }
1938
1939 if(ps_dec->pu1_bits_buf_dynamic)
1940 {
1941 pu1_bitstrm_buf = ps_dec->pu1_bits_buf_dynamic;
1942 buf_size = ps_dec->u4_dynamic_bits_buf_size;
1943 }
1944 else
1945 {
1946 pu1_bitstrm_buf = ps_dec->pu1_bits_buf_static;
1947 buf_size = ps_dec->u4_static_bits_buf_size;
1948 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301949
1950 u4_next_is_aud = 0;
1951
1952 buflen = ih264d_find_start_code(pu1_buf, 0, u4_max_ofst,
1953 &u4_length_of_start_code,
1954 &u4_next_is_aud);
1955
1956 if(buflen == -1)
1957 buflen = 0;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07001958 /* Ignore bytes beyond the allocated size of intermediate buffer */
Harish Mahendrakar251b0072015-08-04 09:55:15 +05301959 buflen = MIN(buflen, buf_size);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301960
1961 bytes_consumed = buflen + u4_length_of_start_code;
1962 ps_dec_op->u4_num_bytes_consumed += bytes_consumed;
1963
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301964 {
1965 UWORD8 u1_firstbyte, u1_nal_ref_idc;
1966
1967 if(ps_dec->i4_app_skip_mode == IVD_SKIP_B)
1968 {
1969 u1_firstbyte = *(pu1_buf + u4_length_of_start_code);
1970 u1_nal_ref_idc = (UWORD8)(NAL_REF_IDC(u1_firstbyte));
1971 if(u1_nal_ref_idc == 0)
1972 {
1973 /*skip non reference frames*/
1974 cur_slice_is_nonref = 1;
1975 continue;
1976 }
1977 else
1978 {
1979 if(1 == cur_slice_is_nonref)
1980 {
1981 /*We have encountered a referenced frame,return to app*/
1982 ps_dec_op->u4_num_bytes_consumed -=
1983 bytes_consumed;
1984 ps_dec_op->e_pic_type = IV_B_FRAME;
1985 ps_dec_op->u4_error_code =
1986 IVD_DEC_FRM_SKIPPED;
1987 ps_dec_op->u4_error_code |= (1
1988 << IVD_UNSUPPORTEDPARAM);
1989 ps_dec_op->u4_frame_decoded_flag = 0;
1990 ps_dec_op->u4_size =
1991 sizeof(ivd_video_decode_op_t);
1992 /*signal the decode thread*/
Hamsalekha S8d3d3032015-03-13 21:24:58 +05301993 ih264d_signal_decode_thread(ps_dec);
1994 /* close deblock thread if it is not closed yet*/
1995 if(ps_dec->u4_num_cores == 3)
1996 {
1997 ih264d_signal_bs_deblk_thread(ps_dec);
1998 }
1999
2000 return (IV_FAIL);
2001 }
2002 }
2003
2004 }
2005
2006 }
2007
2008
2009 if(buflen)
2010 {
2011 memcpy(pu1_bitstrm_buf, pu1_buf + u4_length_of_start_code,
2012 buflen);
Harish Mahendrakar7ba9f342015-08-26 16:17:55 +05302013 /* Decoder may read extra 8 bytes near end of the frame */
2014 if((buflen + 8) < buf_size)
2015 {
2016 memset(pu1_bitstrm_buf + buflen, 0, 8);
2017 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302018 u4_first_start_code_found = 1;
2019
2020 }
2021 else
2022 {
2023 /*start code not found*/
2024
2025 if(u4_first_start_code_found == 0)
2026 {
2027 /*no start codes found in current process call*/
2028
2029 ps_dec->i4_error_code = ERROR_START_CODE_NOT_FOUND;
2030 ps_dec_op->u4_error_code |= 1 << IVD_INSUFFICIENTDATA;
2031
2032 if(ps_dec->u4_pic_buf_got == 0)
2033 {
2034
2035 ih264d_fill_output_struct_from_context(ps_dec,
2036 ps_dec_op);
2037
2038 ps_dec_op->u4_error_code = ps_dec->i4_error_code;
2039 ps_dec_op->u4_frame_decoded_flag = 0;
2040
2041 return (IV_FAIL);
2042 }
2043 else
2044 {
2045 ps_dec->u1_pic_decode_done = 1;
2046 continue;
2047 }
2048 }
2049 else
2050 {
2051 /* a start code has already been found earlier in the same process call*/
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002052 frame_data_left = 0;
Harish Mahendrakar2cd2f7a2017-01-16 11:26:26 +05302053 header_data_left = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302054 continue;
2055 }
2056
2057 }
2058
2059 ps_dec->u4_return_to_app = 0;
2060 ret = ih264d_parse_nal_unit(dec_hdl, ps_dec_op,
2061 pu1_bitstrm_buf, buflen);
2062 if(ret != OK)
2063 {
2064 UWORD32 error = ih264d_map_error(ret);
2065 ps_dec_op->u4_error_code = error | ret;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002066 api_ret_value = IV_FAIL;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302067
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302068 if((ret == IVD_RES_CHANGED)
Harish Mahendrakare027a112015-10-02 15:58:13 +05302069 || (ret == IVD_MEM_ALLOC_FAILED)
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302070 || (ret == ERROR_UNAVAIL_PICBUF_T)
Harish Mahendrakar3a419ea2016-05-26 10:46:21 +05302071 || (ret == ERROR_UNAVAIL_MVBUF_T)
2072 || (ret == ERROR_INV_SPS_PPS_T))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302073 {
Harish Mahendrakar3a419ea2016-05-26 10:46:21 +05302074 ps_dec->u4_slice_start_code_found = 0;
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302075 break;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002076 }
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302077
2078 if((ret == ERROR_INCOMPLETE_FRAME) || (ret == ERROR_DANGLING_FIELD_IN_PIC))
2079 {
2080 ps_dec_op->u4_num_bytes_consumed -= bytes_consumed;
2081 api_ret_value = IV_FAIL;
2082 break;
2083 }
2084
2085 if(ret == ERROR_IN_LAST_SLICE_OF_PIC)
2086 {
2087 api_ret_value = IV_FAIL;
2088 break;
2089 }
2090
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302091 }
2092
2093 if(ps_dec->u4_return_to_app)
2094 {
2095 /*We have encountered a referenced frame,return to app*/
2096 ps_dec_op->u4_num_bytes_consumed -= bytes_consumed;
2097 ps_dec_op->u4_error_code = IVD_DEC_FRM_SKIPPED;
2098 ps_dec_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2099 ps_dec_op->u4_frame_decoded_flag = 0;
2100 ps_dec_op->u4_size = sizeof(ivd_video_decode_op_t);
2101 /*signal the decode thread*/
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302102 ih264d_signal_decode_thread(ps_dec);
2103 /* close deblock thread if it is not closed yet*/
2104 if(ps_dec->u4_num_cores == 3)
2105 {
2106 ih264d_signal_bs_deblk_thread(ps_dec);
2107 }
2108 return (IV_FAIL);
2109
2110 }
2111
2112
2113
2114 header_data_left = ((ps_dec->i4_decode_header == 1)
2115 && (ps_dec->i4_header_decoded != 3)
2116 && (ps_dec_op->u4_num_bytes_consumed
2117 < ps_dec_ip->u4_num_Bytes));
2118 frame_data_left = (((ps_dec->i4_decode_header == 0)
2119 && ((ps_dec->u1_pic_decode_done == 0)
2120 || (u4_next_is_aud == 1)))
2121 && (ps_dec_op->u4_num_bytes_consumed
2122 < ps_dec_ip->u4_num_Bytes));
2123 }
2124 while(( header_data_left == 1)||(frame_data_left == 1));
2125
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002126 if((ps_dec->u4_slice_start_code_found == 1)
Harish Mahendrakare027a112015-10-02 15:58:13 +05302127 && (ret != IVD_MEM_ALLOC_FAILED)
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002128 && ps_dec->u2_total_mbs_coded < ps_dec->u2_frm_ht_in_mbs * ps_dec->u2_frm_wd_in_mbs)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302129 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002130 // last slice - missing/corruption
2131 WORD32 num_mb_skipped;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302132 WORD32 prev_slice_err;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002133 pocstruct_t temp_poc;
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302134 WORD32 ret1;
Harish Mahendrakare1cf7ea2016-12-26 11:21:07 +05302135 WORD32 ht_in_mbs;
2136 ht_in_mbs = ps_dec->u2_pic_ht >> (4 + ps_dec->ps_cur_slice->u1_field_pic_flag);
2137 num_mb_skipped = (ht_in_mbs * ps_dec->u2_frm_wd_in_mbs)
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002138 - ps_dec->u2_total_mbs_coded;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302139
Harish Mahendrakarc7a1cf42016-02-01 15:08:19 +05302140 if(ps_dec->u4_first_slice_in_pic && (ps_dec->u4_pic_buf_got == 0))
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302141 prev_slice_err = 1;
2142 else
2143 prev_slice_err = 2;
2144
Harish Mahendrakarb9269052016-07-12 10:37:28 +05302145 if(ps_dec->u4_first_slice_in_pic && (ps_dec->u2_total_mbs_coded == 0))
2146 prev_slice_err = 1;
2147
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302148 ret1 = ih264d_mark_err_slice_skip(ps_dec, num_mb_skipped, ps_dec->u1_nal_unit_type == IDR_SLICE_NAL, ps_dec->ps_cur_slice->u2_frame_num,
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302149 &temp_poc, prev_slice_err);
2150
Harish Mahendrakarc2e8ffe2016-09-17 14:04:29 +05302151 if((ret1 == ERROR_UNAVAIL_PICBUF_T) || (ret1 == ERROR_UNAVAIL_MVBUF_T) ||
2152 (ret1 == ERROR_INV_SPS_PPS_T))
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302153 {
Harish Mahendrakarc2e8ffe2016-09-17 14:04:29 +05302154 ret = ret1;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302155 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302156 }
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002157
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302158 if((ret == IVD_RES_CHANGED)
Harish Mahendrakare027a112015-10-02 15:58:13 +05302159 || (ret == IVD_MEM_ALLOC_FAILED)
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302160 || (ret == ERROR_UNAVAIL_PICBUF_T)
Harish Mahendrakar3a419ea2016-05-26 10:46:21 +05302161 || (ret == ERROR_UNAVAIL_MVBUF_T)
2162 || (ret == ERROR_INV_SPS_PPS_T))
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302163 {
2164
2165 /* signal the decode thread */
2166 ih264d_signal_decode_thread(ps_dec);
2167 /* close deblock thread if it is not closed yet */
2168 if(ps_dec->u4_num_cores == 3)
2169 {
2170 ih264d_signal_bs_deblk_thread(ps_dec);
2171 }
Harish Mahendrakarc7a1cf42016-02-01 15:08:19 +05302172 /* dont consume bitstream for change in resolution case */
2173 if(ret == IVD_RES_CHANGED)
2174 {
2175 ps_dec_op->u4_num_bytes_consumed -= bytes_consumed;
2176 }
Hamsalekha Se789d1d2015-07-10 13:41:00 +05302177 return IV_FAIL;
2178 }
2179
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002180
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302181 if(ps_dec->u1_separate_parse)
2182 {
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302183 /* If Format conversion is not complete,
2184 complete it here */
2185 if(ps_dec->u4_num_cores == 2)
2186 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002187
2188 /*do deblocking of all mbs*/
2189 if((ps_dec->u4_nmb_deblk == 0) &&(ps_dec->u4_start_recon_deblk == 1) && (ps_dec->ps_cur_sps->u1_mb_aff_flag == 0))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302190 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002191 UWORD32 u4_num_mbs,u4_max_addr;
2192 tfr_ctxt_t s_tfr_ctxt;
2193 tfr_ctxt_t *ps_tfr_cxt = &s_tfr_ctxt;
2194 pad_mgr_t *ps_pad_mgr = &ps_dec->s_pad_mgr;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302195
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002196 /*BS is done for all mbs while parsing*/
2197 u4_max_addr = (ps_dec->u2_frm_wd_in_mbs * ps_dec->u2_frm_ht_in_mbs) - 1;
2198 ps_dec->u4_cur_bs_mb_num = u4_max_addr + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302199
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302200
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002201 ih264d_init_deblk_tfr_ctxt(ps_dec, ps_pad_mgr, ps_tfr_cxt,
2202 ps_dec->u2_frm_wd_in_mbs, 0);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302203
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002204
2205 u4_num_mbs = u4_max_addr
2206 - ps_dec->u4_cur_deblk_mb_num + 1;
2207
2208 DEBUG_PERF_PRINTF("mbs left for deblocking= %d \n",u4_num_mbs);
2209
2210 if(u4_num_mbs != 0)
2211 ih264d_check_mb_map_deblk(ps_dec, u4_num_mbs,
2212 ps_tfr_cxt,1);
2213
2214 ps_dec->u4_start_recon_deblk = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302215
2216 }
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002217
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302218 }
2219
2220 /*signal the decode thread*/
2221 ih264d_signal_decode_thread(ps_dec);
2222 /* close deblock thread if it is not closed yet*/
2223 if(ps_dec->u4_num_cores == 3)
2224 {
2225 ih264d_signal_bs_deblk_thread(ps_dec);
2226 }
2227 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302228
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002229
2230 DATA_SYNC();
2231
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302232
2233 if((ps_dec_op->u4_error_code & 0xff)
2234 != ERROR_DYNAMIC_RESOLUTION_NOT_SUPPORTED)
2235 {
2236 ps_dec_op->u4_pic_wd = (UWORD32)ps_dec->u2_disp_width;
2237 ps_dec_op->u4_pic_ht = (UWORD32)ps_dec->u2_disp_height;
2238 }
2239
2240//Report if header (sps and pps) has not been decoded yet
2241 if(ps_dec->i4_header_decoded != 3)
2242 {
2243 ps_dec_op->u4_error_code |= (1 << IVD_INSUFFICIENTDATA);
2244
2245 }
2246
2247 if(ps_dec->i4_decode_header == 1 && ps_dec->i4_header_decoded != 3)
2248 {
2249 ps_dec_op->u4_error_code |= (1 << IVD_INSUFFICIENTDATA);
2250
2251 }
2252 if(ps_dec->u4_prev_nal_skipped)
2253 {
2254 /*We have encountered a referenced frame,return to app*/
2255 ps_dec_op->u4_error_code = IVD_DEC_FRM_SKIPPED;
2256 ps_dec_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2257 ps_dec_op->u4_frame_decoded_flag = 0;
2258 ps_dec_op->u4_size = sizeof(ivd_video_decode_op_t);
2259 /* close deblock thread if it is not closed yet*/
2260 if(ps_dec->u4_num_cores == 3)
2261 {
2262 ih264d_signal_bs_deblk_thread(ps_dec);
2263 }
2264 return (IV_FAIL);
2265
2266 }
2267
2268 if((ps_dec->u4_slice_start_code_found == 1)
2269 && (ERROR_DANGLING_FIELD_IN_PIC != i4_err_status))
2270 {
2271 /*
2272 * For field pictures, set the bottom and top picture decoded u4_flag correctly.
2273 */
2274
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302275 if(ps_dec->ps_cur_slice->u1_field_pic_flag)
2276 {
2277 if(1 == ps_dec->ps_cur_slice->u1_bottom_field_flag)
2278 {
2279 ps_dec->u1_top_bottom_decoded |= BOT_FIELD_ONLY;
2280 }
2281 else
2282 {
2283 ps_dec->u1_top_bottom_decoded |= TOP_FIELD_ONLY;
2284 }
2285 }
2286
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302287 /* if new frame in not found (if we are still getting slices from previous frame)
2288 * ih264d_deblock_display is not called. Such frames will not be added to reference /display
2289 */
Harish Mahendrakar31836842016-12-26 11:02:13 +05302290 if (((ps_dec->ps_dec_err_status->u1_err_flag & REJECT_CUR_PIC) == 0)
2291 && (ps_dec->u4_pic_buf_got == 1))
Hamsalekha S9f0dcba2015-06-09 15:54:31 +05302292 {
2293 /* Calling Function to deblock Picture and Display */
2294 ret = ih264d_deblock_display(ps_dec);
2295 if(ret != 0)
2296 {
2297 return IV_FAIL;
2298 }
2299 }
2300
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302301
2302 /*set to complete ,as we dont support partial frame decode*/
2303 if(ps_dec->i4_header_decoded == 3)
2304 {
2305 ps_dec->u2_total_mbs_coded = ps_dec->ps_cur_sps->u2_max_mb_addr + 1;
2306 }
2307
2308 /*Update the i4_frametype at the end of picture*/
2309 if(ps_dec->ps_cur_slice->u1_nal_unit_type == IDR_SLICE_NAL)
2310 {
2311 ps_dec->i4_frametype = IV_IDR_FRAME;
2312 }
2313 else if(ps_dec->i4_pic_type == B_SLICE)
2314 {
2315 ps_dec->i4_frametype = IV_B_FRAME;
2316 }
2317 else if(ps_dec->i4_pic_type == P_SLICE)
2318 {
2319 ps_dec->i4_frametype = IV_P_FRAME;
2320 }
2321 else if(ps_dec->i4_pic_type == I_SLICE)
2322 {
2323 ps_dec->i4_frametype = IV_I_FRAME;
2324 }
2325 else
2326 {
2327 H264_DEC_DEBUG_PRINT("Shouldn't come here\n");
2328 }
2329
2330 //Update the content type
2331 ps_dec->i4_content_type = ps_dec->ps_cur_slice->u1_field_pic_flag;
2332
2333 ps_dec->u4_total_frames_decoded = ps_dec->u4_total_frames_decoded + 2;
2334 ps_dec->u4_total_frames_decoded = ps_dec->u4_total_frames_decoded
2335 - ps_dec->ps_cur_slice->u1_field_pic_flag;
2336
2337 }
2338
2339 /* close deblock thread if it is not closed yet*/
2340 if(ps_dec->u4_num_cores == 3)
2341 {
2342 ih264d_signal_bs_deblk_thread(ps_dec);
2343 }
2344
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002345
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302346 {
2347 /* In case the decoder is configured to run in low delay mode,
2348 * then get display buffer and then format convert.
2349 * Note in this mode, format conversion does not run paralelly in a thread and adds to the codec cycles
2350 */
2351
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302352 if((IVD_DECODE_FRAME_OUT == ps_dec->e_frm_out_mode)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302353 && ps_dec->u1_init_dec_flag)
2354 {
2355
2356 ih264d_get_next_display_field(ps_dec, ps_dec->ps_out_buffer,
2357 &(ps_dec->s_disp_op));
2358 if(0 == ps_dec->s_disp_op.u4_error_code)
2359 {
2360 ps_dec->u4_fmt_conv_cur_row = 0;
2361 ps_dec->u4_output_present = 1;
2362 }
2363 }
2364
2365 ih264d_fill_output_struct_from_context(ps_dec, ps_dec_op);
2366
2367 /* If Format conversion is not complete,
2368 complete it here */
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002369 if(ps_dec->u4_output_present &&
2370 (ps_dec->u4_fmt_conv_cur_row < ps_dec->s_disp_frame_info.u4_y_ht))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302371 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002372 ps_dec->u4_fmt_conv_num_rows = ps_dec->s_disp_frame_info.u4_y_ht
2373 - ps_dec->u4_fmt_conv_cur_row;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302374 ih264d_format_convert(ps_dec, &(ps_dec->s_disp_op),
2375 ps_dec->u4_fmt_conv_cur_row,
2376 ps_dec->u4_fmt_conv_num_rows);
2377 ps_dec->u4_fmt_conv_cur_row += ps_dec->u4_fmt_conv_num_rows;
2378 }
2379
2380 ih264d_release_display_field(ps_dec, &(ps_dec->s_disp_op));
2381 }
2382
2383 if(ps_dec->i4_decode_header == 1 && (ps_dec->i4_header_decoded & 1) == 1)
2384 {
2385 ps_dec_op->u4_progressive_frame_flag = 1;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002386 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302387 {
2388 if((0 == ps_dec->ps_sps->u1_frame_mbs_only_flag)
2389 && (0 == ps_dec->ps_sps->u1_mb_aff_flag))
2390 ps_dec_op->u4_progressive_frame_flag = 0;
2391
2392 }
2393 }
2394
2395 /*Data memory barrier instruction,so that yuv write by the library is complete*/
2396 DATA_SYNC();
2397
2398 H264_DEC_DEBUG_PRINT("The num bytes consumed: %d\n",
2399 ps_dec_op->u4_num_bytes_consumed);
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002400 return api_ret_value;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302401}
2402
2403WORD32 ih264d_get_version(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
2404{
2405 char version_string[MAXVERSION_STRLEN + 1];
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002406 UWORD32 version_string_len;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302407
2408 ivd_ctl_getversioninfo_ip_t *ps_ip;
2409 ivd_ctl_getversioninfo_op_t *ps_op;
2410
2411 ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
2412 ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
2413 UNUSED(dec_hdl);
2414 ps_op->u4_error_code = IV_SUCCESS;
2415
2416 VERSION(version_string, CODEC_NAME, CODEC_RELEASE_TYPE, CODEC_RELEASE_VER,
2417 CODEC_VENDOR);
2418
2419 if((WORD32)ps_ip->u4_version_buffer_size <= 0)
2420 {
2421 ps_op->u4_error_code = IH264D_VERS_BUF_INSUFFICIENT;
2422 return (IV_FAIL);
2423 }
2424
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302425 version_string_len = strnlen(version_string, MAXVERSION_STRLEN) + 1;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002426
2427 if(ps_ip->u4_version_buffer_size >= version_string_len) //(WORD32)sizeof(sizeof(version_string)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302428 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002429 memcpy(ps_ip->pv_version_buffer, version_string, version_string_len);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302430 ps_op->u4_error_code = IV_SUCCESS;
2431 }
2432 else
2433 {
2434 ps_op->u4_error_code = IH264D_VERS_BUF_INSUFFICIENT;
2435 return IV_FAIL;
2436 }
2437 return (IV_SUCCESS);
2438}
2439
2440/*****************************************************************************/
2441/* */
2442/* Function Name : ih264d_get_display_frame */
2443/* */
2444/* Description : */
2445/* Inputs :iv_obj_t decoder handle */
2446/* :pv_api_ip pointer to input structure */
2447/* :pv_api_op pointer to output structure */
2448/* Outputs : */
2449/* Returns : void */
2450/* */
2451/* Issues : none */
2452/* */
2453/* Revision History: */
2454/* */
2455/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2456/* 22 10 2008 100356 Draft */
2457/* */
2458/*****************************************************************************/
2459WORD32 ih264d_get_display_frame(iv_obj_t *dec_hdl,
2460 void *pv_api_ip,
2461 void *pv_api_op)
2462{
2463
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002464 UNUSED(dec_hdl);
2465 UNUSED(pv_api_ip);
2466 UNUSED(pv_api_op);
2467 // This function is no longer needed, output is returned in the process()
2468 return IV_FAIL;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302469}
2470
2471/*****************************************************************************/
2472/* */
2473/* Function Name : ih264d_set_display_frame */
2474/* */
2475/* Description : */
2476/* */
2477/* Inputs :iv_obj_t decoder handle */
2478/* :pv_api_ip pointer to input structure */
2479/* :pv_api_op pointer to output structure */
2480/* Outputs : */
2481/* Returns : void */
2482/* */
2483/* Issues : none */
2484/* */
2485/* Revision History: */
2486/* */
2487/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2488/* 22 10 2008 100356 Draft */
2489/* */
2490/*****************************************************************************/
2491WORD32 ih264d_set_display_frame(iv_obj_t *dec_hdl,
2492 void *pv_api_ip,
2493 void *pv_api_op)
2494{
2495
2496 ivd_set_display_frame_ip_t *dec_disp_ip;
2497 ivd_set_display_frame_op_t *dec_disp_op;
2498
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302499 UWORD32 i;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302500 dec_struct_t * ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
2501
2502 dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2503 dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2504 dec_disp_op->u4_error_code = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302505
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302506
2507 ps_dec->u4_num_disp_bufs = 0;
2508 if(ps_dec->u4_share_disp_buf)
2509 {
2510 UWORD32 u4_num_bufs = dec_disp_ip->num_disp_bufs;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302511
2512 u4_num_bufs = MIN(u4_num_bufs, MAX_DISP_BUFS_NEW);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302513
2514 ps_dec->u4_num_disp_bufs = u4_num_bufs;
2515 for(i = 0; i < u4_num_bufs; i++)
2516 {
2517 ps_dec->disp_bufs[i].u4_num_bufs =
2518 dec_disp_ip->s_disp_buffer[i].u4_num_bufs;
2519
2520 ps_dec->disp_bufs[i].buf[0] =
2521 dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2522 ps_dec->disp_bufs[i].buf[1] =
2523 dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2524 ps_dec->disp_bufs[i].buf[2] =
2525 dec_disp_ip->s_disp_buffer[i].pu1_bufs[2];
2526
2527 ps_dec->disp_bufs[i].u4_bufsize[0] =
2528 dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[0];
2529 ps_dec->disp_bufs[i].u4_bufsize[1] =
2530 dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[1];
2531 ps_dec->disp_bufs[i].u4_bufsize[2] =
2532 dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[2];
2533
2534 }
2535 }
2536 return IV_SUCCESS;
2537
2538}
2539
2540/*****************************************************************************/
2541/* */
2542/* Function Name : ih264d_set_flush_mode */
2543/* */
2544/* Description : */
2545/* */
2546/* Inputs :iv_obj_t decoder handle */
2547/* :pv_api_ip pointer to input structure */
2548/* :pv_api_op pointer to output structure */
2549/* Globals : <Does it use any global variables?> */
2550/* Outputs : */
2551/* Returns : void */
2552/* */
2553/* Issues : none */
2554/* */
2555/* Revision History: */
2556/* */
2557/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2558/* 22 10 2008 100356 Draft */
2559/* */
2560/*****************************************************************************/
2561WORD32 ih264d_set_flush_mode(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
2562{
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302563 dec_struct_t * ps_dec;
2564 ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t*)pv_api_op;
2565 ps_ctl_op->u4_error_code = 0;
2566
2567 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
2568 UNUSED(pv_api_ip);
2569 /* ! */
2570 /* Signal flush frame control call */
2571 ps_dec->u1_flushfrm = 1;
2572
Harish Mahendrakar59348122015-09-02 09:01:40 +05302573 if(ps_dec->u1_init_dec_flag == 1)
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002574 {
Harish Mahendrakar59348122015-09-02 09:01:40 +05302575 ih264d_release_pics_in_dpb((void *)ps_dec, ps_dec->u1_pic_bufs);
2576 ih264d_release_display_bufs(ps_dec);
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002577 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302578
Harish Mahendrakar59348122015-09-02 09:01:40 +05302579 ps_ctl_op->u4_error_code = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302580
2581 return IV_SUCCESS;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302582}
2583
2584/*****************************************************************************/
2585/* */
2586/* Function Name : ih264d_get_status */
2587/* */
2588/* Description : */
2589/* */
2590/* Inputs :iv_obj_t decoder handle */
2591/* :pv_api_ip pointer to input structure */
2592/* :pv_api_op pointer to output structure */
2593/* Globals : <Does it use any global variables?> */
2594/* Outputs : */
2595/* Returns : void */
2596/* */
2597/* Issues : none */
2598/* */
2599/* Revision History: */
2600/* */
2601/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2602/* 22 10 2008 100356 Draft */
2603/* */
2604/*****************************************************************************/
2605
2606WORD32 ih264d_get_status(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
2607{
2608
2609 UWORD32 i;
2610 dec_struct_t * ps_dec;
2611 UWORD32 pic_wd, pic_ht;
2612 ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t*)pv_api_op;
2613 UNUSED(pv_api_ip);
2614 ps_ctl_op->u4_error_code = 0;
2615
2616 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
2617
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302618
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002619 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302620 {
2621 ps_ctl_op->u4_pic_ht = ps_dec->u2_disp_height;
2622 ps_ctl_op->u4_pic_wd = ps_dec->u2_disp_width;
2623
2624 if(0 == ps_dec->u4_share_disp_buf)
2625 {
2626 pic_wd = ps_dec->u2_disp_width;
2627 pic_ht = ps_dec->u2_disp_height;
2628
2629 }
2630 else
2631 {
2632 pic_wd = ps_dec->u2_frm_wd_y;
2633 pic_ht = ps_dec->u2_frm_ht_y;
2634 }
2635 }
2636 else
2637 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302638 pic_wd = 0;
2639 pic_ht = 0;
2640
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302641 ps_ctl_op->u4_pic_ht = pic_wd;
2642 ps_ctl_op->u4_pic_wd = pic_ht;
2643
2644 if(1 == ps_dec->u4_share_disp_buf)
2645 {
2646 pic_wd += (PAD_LEN_Y_H << 1);
2647 pic_ht += (PAD_LEN_Y_V << 2);
2648
2649 }
2650
2651 }
2652
2653 if(ps_dec->u4_app_disp_width > pic_wd)
2654 pic_wd = ps_dec->u4_app_disp_width;
2655 if(0 == ps_dec->u4_share_disp_buf)
2656 ps_ctl_op->u4_num_disp_bufs = 1;
2657 else
2658 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002659 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302660 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302661 if((ps_dec->ps_cur_sps->u1_vui_parameters_present_flag == 1) &&
2662 (1 == ps_dec->ps_cur_sps->s_vui.u1_bitstream_restriction_flag))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302663 {
2664 ps_ctl_op->u4_num_disp_bufs =
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302665 ps_dec->ps_cur_sps->s_vui.u4_num_reorder_frames + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302666 }
2667 else
2668 {
2669 /*if VUI is not present assume maximum possible refrence frames for the level,
2670 * as max reorder frames*/
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302671 ps_ctl_op->u4_num_disp_bufs = ih264d_get_dpb_size(ps_dec->ps_cur_sps);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302672 }
2673
2674 ps_ctl_op->u4_num_disp_bufs +=
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002675 ps_dec->ps_cur_sps->u1_num_ref_frames + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302676 }
2677 else
2678 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302679 ps_ctl_op->u4_num_disp_bufs = 32;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302680 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302681 ps_ctl_op->u4_num_disp_bufs = MAX(
2682 ps_ctl_op->u4_num_disp_bufs, 6);
2683 ps_ctl_op->u4_num_disp_bufs = MIN(
2684 ps_ctl_op->u4_num_disp_bufs, 32);
2685 }
2686
2687 ps_ctl_op->u4_error_code = ps_dec->i4_error_code;
2688
2689 ps_ctl_op->u4_frame_rate = 0; //make it proper
2690 ps_ctl_op->u4_bit_rate = 0; //make it proper
2691 ps_ctl_op->e_content_type = ps_dec->i4_content_type;
2692 ps_ctl_op->e_output_chroma_format = ps_dec->u1_chroma_format;
2693 ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2694
2695 if(ps_dec->u1_chroma_format == IV_YUV_420P)
2696 {
2697 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2698 }
2699 else if(ps_dec->u1_chroma_format == IV_YUV_422ILE)
2700 {
2701 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2702 }
2703 else if(ps_dec->u1_chroma_format == IV_RGB_565)
2704 {
2705 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2706 }
2707 else if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
2708 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU))
2709 {
2710 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2711 }
2712
2713 else
2714 {
2715 //Invalid chroma format; Error code may be updated, verify in testing if needed
2716 ps_ctl_op->u4_error_code = ERROR_FEATURE_UNAVAIL;
2717 return IV_FAIL;
2718 }
2719
2720 for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
2721 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302722 ps_ctl_op->u4_min_in_buf_size[i] = MAX(256000, pic_wd * pic_ht * 3 / 2);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302723 }
2724
2725 /*!*/
2726 if(ps_dec->u1_chroma_format == IV_YUV_420P)
2727 {
2728 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht);
2729 ps_ctl_op->u4_min_out_buf_size[1] = (pic_wd * pic_ht)
2730 >> 2;
2731 ps_ctl_op->u4_min_out_buf_size[2] = (pic_wd * pic_ht)
2732 >> 2;
2733 }
2734 else if(ps_dec->u1_chroma_format == IV_YUV_422ILE)
2735 {
2736 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht)
2737 * 2;
2738 ps_ctl_op->u4_min_out_buf_size[1] =
2739 ps_ctl_op->u4_min_out_buf_size[2] = 0;
2740 }
2741 else if(ps_dec->u1_chroma_format == IV_RGB_565)
2742 {
2743 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht)
2744 * 2;
2745 ps_ctl_op->u4_min_out_buf_size[1] =
2746 ps_ctl_op->u4_min_out_buf_size[2] = 0;
2747 }
2748 else if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
2749 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU))
2750 {
2751 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht);
2752 ps_ctl_op->u4_min_out_buf_size[1] = (pic_wd * pic_ht)
2753 >> 1;
2754 ps_ctl_op->u4_min_out_buf_size[2] = 0;
2755 }
2756
2757 ps_dec->u4_num_disp_bufs_requested = ps_ctl_op->u4_num_disp_bufs;
2758 return IV_SUCCESS;
2759}
2760
2761/*****************************************************************************/
2762/* */
2763/* Function Name : ih264d_get_buf_info */
2764/* */
2765/* Description : */
2766/* */
2767/* Inputs :iv_obj_t decoder handle */
2768/* :pv_api_ip pointer to input structure */
2769/* :pv_api_op pointer to output structure */
2770/* Globals : <Does it use any global variables?> */
2771/* Outputs : */
2772/* Returns : void */
2773/* */
2774/* Issues : none */
2775/* */
2776/* Revision History: */
2777/* */
2778/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2779/* 22 10 2008 100356 Draft */
2780/* */
2781/*****************************************************************************/
2782WORD32 ih264d_get_buf_info(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
2783{
2784
2785 dec_struct_t * ps_dec;
2786 UWORD8 i = 0; // Default for 420P format
2787 UWORD16 pic_wd, pic_ht;
2788 ivd_ctl_getbufinfo_op_t *ps_ctl_op =
2789 (ivd_ctl_getbufinfo_op_t*)pv_api_op;
2790 UNUSED(pv_api_ip);
2791 ps_ctl_op->u4_error_code = 0;
2792
2793 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
2794
2795 ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2796 if(ps_dec->u1_chroma_format == IV_YUV_420P)
2797 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2798 else if(ps_dec->u1_chroma_format == IV_YUV_422ILE)
2799 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2800 else if(ps_dec->u1_chroma_format == IV_RGB_565)
2801 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2802 else if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
2803 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU))
2804 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2805
2806 else
2807 {
2808 //Invalid chroma format; Error code may be updated, verify in testing if needed
2809 return IV_FAIL;
2810 }
2811
2812 ps_ctl_op->u4_num_disp_bufs = 1;
2813
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302814
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302815 pic_wd = 0;
2816 pic_ht = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302817
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302818 if(ps_dec->i4_header_decoded == 3)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302819 {
2820
2821 if(0 == ps_dec->u4_share_disp_buf)
2822 {
2823 pic_wd = ps_dec->u2_disp_width;
2824 pic_ht = ps_dec->u2_disp_height;
2825
2826 }
2827 else
2828 {
2829 pic_wd = ps_dec->u2_frm_wd_y;
2830 pic_ht = ps_dec->u2_frm_ht_y;
2831 }
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002832
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302833 }
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302834
2835 for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302836 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302837 ps_ctl_op->u4_min_in_buf_size[i] = MAX(256000, pic_wd * pic_ht * 3 / 2);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302838 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302839 if((WORD32)ps_dec->u4_app_disp_width > pic_wd)
2840 pic_wd = ps_dec->u4_app_disp_width;
2841
2842 if(0 == ps_dec->u4_share_disp_buf)
2843 ps_ctl_op->u4_num_disp_bufs = 1;
2844 else
2845 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002846 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302847 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302848 if((ps_dec->ps_cur_sps->u1_vui_parameters_present_flag == 1) &&
2849 (1 == ps_dec->ps_cur_sps->s_vui.u1_bitstream_restriction_flag))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302850 {
2851 ps_ctl_op->u4_num_disp_bufs =
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302852 ps_dec->ps_cur_sps->s_vui.u4_num_reorder_frames + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302853 }
2854 else
2855 {
2856 /*if VUI is not present assume maximum possible refrence frames for the level,
2857 * as max reorder frames*/
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302858 ps_ctl_op->u4_num_disp_bufs = ih264d_get_dpb_size(ps_dec->ps_cur_sps);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302859 }
2860
2861 ps_ctl_op->u4_num_disp_bufs +=
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07002862 ps_dec->ps_cur_sps->u1_num_ref_frames + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302863
2864 }
2865 else
2866 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302867 ps_ctl_op->u4_num_disp_bufs = 32;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302868
2869 }
2870
2871 ps_ctl_op->u4_num_disp_bufs = MAX(
2872 ps_ctl_op->u4_num_disp_bufs, 6);
2873 ps_ctl_op->u4_num_disp_bufs = MIN(
2874 ps_ctl_op->u4_num_disp_bufs, 32);
2875 }
2876
2877 /*!*/
2878 if(ps_dec->u1_chroma_format == IV_YUV_420P)
2879 {
2880 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht);
2881 ps_ctl_op->u4_min_out_buf_size[1] = (pic_wd * pic_ht)
2882 >> 2;
2883 ps_ctl_op->u4_min_out_buf_size[2] = (pic_wd * pic_ht)
2884 >> 2;
2885 }
2886 else if(ps_dec->u1_chroma_format == IV_YUV_422ILE)
2887 {
2888 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht)
2889 * 2;
2890 ps_ctl_op->u4_min_out_buf_size[1] =
2891 ps_ctl_op->u4_min_out_buf_size[2] = 0;
2892 }
2893 else if(ps_dec->u1_chroma_format == IV_RGB_565)
2894 {
2895 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht)
2896 * 2;
2897 ps_ctl_op->u4_min_out_buf_size[1] =
2898 ps_ctl_op->u4_min_out_buf_size[2] = 0;
2899 }
2900 else if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
2901 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU))
2902 {
2903 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht);
2904 ps_ctl_op->u4_min_out_buf_size[1] = (pic_wd * pic_ht)
2905 >> 1;
2906 ps_ctl_op->u4_min_out_buf_size[2] = 0;
2907 }
2908 ps_dec->u4_num_disp_bufs_requested = ps_ctl_op->u4_num_disp_bufs;
2909
2910 return IV_SUCCESS;
2911}
2912
2913/*****************************************************************************/
2914/* */
2915/* Function Name : ih264d_set_params */
2916/* */
2917/* Description : */
2918/* */
2919/* Inputs :iv_obj_t decoder handle */
2920/* :pv_api_ip pointer to input structure */
2921/* :pv_api_op pointer to output structure */
2922/* Outputs : */
2923/* Returns : void */
2924/* */
2925/* Issues : none */
2926/* */
2927/* Revision History: */
2928/* */
2929/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2930/* 22 10 2008 100356 Draft */
2931/* */
2932/*****************************************************************************/
2933WORD32 ih264d_set_params(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
2934{
2935
2936 dec_struct_t * ps_dec;
2937 WORD32 ret = IV_SUCCESS;
2938
2939 ivd_ctl_set_config_ip_t *ps_ctl_ip =
2940 (ivd_ctl_set_config_ip_t *)pv_api_ip;
2941 ivd_ctl_set_config_op_t *ps_ctl_op =
2942 (ivd_ctl_set_config_op_t *)pv_api_op;
2943
2944 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
2945
2946 ps_dec->u4_skip_frm_mask = 0;
2947
2948 ps_ctl_op->u4_error_code = 0;
2949
2950 ps_dec->i4_app_skip_mode = ps_ctl_ip->e_frm_skip_mode;
2951
2952 /*Is it really supported test it when you so the corner testing using test app*/
2953
2954 if(ps_ctl_ip->e_frm_skip_mode != IVD_SKIP_NONE)
2955 {
2956
2957 if(ps_ctl_ip->e_frm_skip_mode == IVD_SKIP_P)
2958 ps_dec->u4_skip_frm_mask |= 1 << P_SLC_BIT;
2959 else if(ps_ctl_ip->e_frm_skip_mode == IVD_SKIP_B)
2960 ps_dec->u4_skip_frm_mask |= 1 << B_SLC_BIT;
2961 else if(ps_ctl_ip->e_frm_skip_mode == IVD_SKIP_PB)
2962 {
2963 ps_dec->u4_skip_frm_mask |= 1 << B_SLC_BIT;
2964 ps_dec->u4_skip_frm_mask |= 1 << P_SLC_BIT;
2965 }
2966 else if(ps_ctl_ip->e_frm_skip_mode == IVD_SKIP_I)
2967 ps_dec->u4_skip_frm_mask |= 1 << I_SLC_BIT;
2968 else
2969 {
2970 //dynamic parameter not supported
2971 //Put an appropriate error code to return the error..
2972 //when you do the error code tests and after that remove this comment
2973 ps_ctl_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2974 ret = IV_FAIL;
2975 }
2976 }
2977
2978 if((0 != ps_dec->u4_app_disp_width)
2979 && (ps_ctl_ip->u4_disp_wd
2980 != ps_dec->u4_app_disp_width))
2981 {
2982 ps_ctl_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2983 ps_ctl_op->u4_error_code |= ERROR_DISP_WIDTH_INVALID;
2984 ret = IV_FAIL;
2985 }
2986 else
2987 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302988 if(ps_ctl_ip->u4_disp_wd >= ps_dec->u2_pic_wd)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302989 {
2990 ps_dec->u4_app_disp_width = ps_ctl_ip->u4_disp_wd;
2991 }
Harish Mahendrakar251b0072015-08-04 09:55:15 +05302992 else if(0 == ps_dec->i4_header_decoded)
Hamsalekha S8d3d3032015-03-13 21:24:58 +05302993 {
2994 ps_dec->u4_app_disp_width = ps_ctl_ip->u4_disp_wd;
2995 }
2996 else if(ps_ctl_ip->u4_disp_wd == 0)
2997 {
2998 ps_dec->u4_app_disp_width = 0;
2999 }
3000 else
3001 {
3002 /*
3003 * Set the display width to zero. This will ensure that the wrong value we had stored (0xFFFFFFFF)
3004 * does not propogate.
3005 */
3006 ps_dec->u4_app_disp_width = 0;
3007 ps_ctl_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
3008 ps_ctl_op->u4_error_code |= ERROR_DISP_WIDTH_INVALID;
3009 ret = IV_FAIL;
3010 }
3011 }
3012 if(ps_ctl_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
3013 ps_dec->i4_decode_header = 0;
3014 else if(ps_ctl_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
3015 ps_dec->i4_decode_header = 1;
3016 else
3017 {
3018 ps_ctl_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
3019 ps_dec->i4_decode_header = 1;
3020 ret = IV_FAIL;
3021 }
Harish Mahendrakar251b0072015-08-04 09:55:15 +05303022 ps_dec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303023
Harish Mahendrakar251b0072015-08-04 09:55:15 +05303024 if((ps_ctl_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
3025 (ps_ctl_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
3026 {
3027 ps_ctl_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
3028 ret = IV_FAIL;
3029 }
3030 ps_dec->e_frm_out_mode = ps_ctl_ip->e_frm_out_mode;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303031 return ret;
3032
3033}
3034
3035/*****************************************************************************/
3036/* */
3037/* Function Name : ih264d_set_default_params */
3038/* */
3039/* Description : */
3040/* */
3041/* Inputs :iv_obj_t decoder handle */
3042/* :pv_api_ip pointer to input structure */
3043/* :pv_api_op pointer to output structure */
3044/* Outputs : */
3045/* Returns : void */
3046/* */
3047/* Issues : none */
3048/* */
3049/* Revision History: */
3050/* */
3051/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3052/* 08 08 2011 100421 Copied from set_params */
3053/* */
3054/*****************************************************************************/
3055WORD32 ih264d_set_default_params(iv_obj_t *dec_hdl,
3056 void *pv_api_ip,
3057 void *pv_api_op)
3058{
3059
3060 dec_struct_t * ps_dec;
3061 WORD32 ret = IV_SUCCESS;
3062
3063 ivd_ctl_set_config_op_t *ps_ctl_op =
3064 (ivd_ctl_set_config_op_t *)pv_api_op;
3065 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
3066 UNUSED(pv_api_ip);
3067
3068
3069 {
3070 ps_dec->u4_app_disp_width = 0;
3071 ps_dec->u4_skip_frm_mask = 0;
3072 ps_dec->i4_decode_header = 1;
3073
3074 ps_ctl_op->u4_error_code = 0;
3075 }
3076
3077
3078 return ret;
3079}
Harish Mahendrakar251b0072015-08-04 09:55:15 +05303080/*****************************************************************************/
3081/* */
3082/* Function Name : ih264d_reset */
3083/* */
3084/* Description : */
3085/* */
3086/* Inputs :iv_obj_t decoder handle */
3087/* :pv_api_ip pointer to input structure */
3088/* :pv_api_op pointer to output structure */
3089/* Globals : <Does it use any global variables?> */
3090/* Outputs : */
3091/* Returns : void */
3092/* */
3093/* Issues : none */
3094/* */
3095/* Revision History: */
3096/* */
3097/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3098/* 22 10 2008 100356 Draft */
3099/* */
3100/*****************************************************************************/
3101WORD32 ih264d_delete(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3102{
3103 dec_struct_t *ps_dec;
3104 ih264d_delete_ip_t *ps_ip = (ih264d_delete_ip_t *)pv_api_ip;
3105 ih264d_delete_op_t *ps_op = (ih264d_delete_op_t *)pv_api_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303106
Harish Mahendrakar251b0072015-08-04 09:55:15 +05303107 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
3108 UNUSED(ps_ip);
3109 ps_op->s_ivd_delete_op_t.u4_error_code = 0;
3110 ih264d_free_dynamic_bufs(ps_dec);
3111 ih264d_free_static_bufs(dec_hdl);
3112 return IV_SUCCESS;
3113}
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303114/*****************************************************************************/
3115/* */
3116/* Function Name : ih264d_reset */
3117/* */
3118/* Description : */
3119/* */
3120/* Inputs :iv_obj_t decoder handle */
3121/* :pv_api_ip pointer to input structure */
3122/* :pv_api_op pointer to output structure */
3123/* Globals : <Does it use any global variables?> */
3124/* Outputs : */
3125/* Returns : void */
3126/* */
3127/* Issues : none */
3128/* */
3129/* Revision History: */
3130/* */
3131/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3132/* 22 10 2008 100356 Draft */
3133/* */
3134/*****************************************************************************/
3135WORD32 ih264d_reset(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3136{
3137 dec_struct_t * ps_dec;
3138 ivd_ctl_reset_op_t *ps_ctl_op = (ivd_ctl_reset_op_t *)pv_api_op;
3139 UNUSED(pv_api_ip);
3140 ps_ctl_op->u4_error_code = 0;
3141
3142 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
Harish Mahendrakar251b0072015-08-04 09:55:15 +05303143
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303144 if(ps_dec != NULL)
3145 {
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303146 ih264d_init_decoder(ps_dec);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303147 }
3148 else
3149 {
3150 H264_DEC_DEBUG_PRINT(
3151 "\nReset called without Initializing the decoder\n");
3152 ps_ctl_op->u4_error_code = ERROR_INIT_NOT_DONE;
3153 }
3154
3155 return IV_SUCCESS;
3156}
3157
3158/*****************************************************************************/
3159/* */
3160/* Function Name : ih264d_ctl */
3161/* */
3162/* Description : */
3163/* */
3164/* Inputs :iv_obj_t decoder handle */
3165/* :pv_api_ip pointer to input structure */
3166/* :pv_api_op pointer to output structure */
3167/* Outputs : */
3168/* Returns : void */
3169/* */
3170/* Issues : none */
3171/* */
3172/* Revision History: */
3173/* */
3174/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3175/* 22 10 2008 100356 Draft */
3176/* */
3177/*****************************************************************************/
3178WORD32 ih264d_ctl(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3179{
3180 ivd_ctl_set_config_ip_t *ps_ctl_ip;
3181 ivd_ctl_set_config_op_t *ps_ctl_op;
3182 WORD32 ret = IV_SUCCESS;
3183 UWORD32 subcommand;
3184 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3185
3186 if(ps_dec->init_done != 1)
3187 {
3188 //Return proper Error Code
3189 return IV_FAIL;
3190 }
3191 ps_ctl_ip = (ivd_ctl_set_config_ip_t*)pv_api_ip;
3192 ps_ctl_op = (ivd_ctl_set_config_op_t*)pv_api_op;
3193 ps_ctl_op->u4_error_code = 0;
3194 subcommand = ps_ctl_ip->e_sub_cmd;
3195
3196 switch(subcommand)
3197 {
3198 case IVD_CMD_CTL_GETPARAMS:
3199 ret = ih264d_get_status(dec_hdl, (void *)pv_api_ip,
3200 (void *)pv_api_op);
3201 break;
3202 case IVD_CMD_CTL_SETPARAMS:
3203 ret = ih264d_set_params(dec_hdl, (void *)pv_api_ip,
3204 (void *)pv_api_op);
3205 break;
3206 case IVD_CMD_CTL_RESET:
3207 ret = ih264d_reset(dec_hdl, (void *)pv_api_ip, (void *)pv_api_op);
3208 break;
3209 case IVD_CMD_CTL_SETDEFAULT:
3210 ret = ih264d_set_default_params(dec_hdl, (void *)pv_api_ip,
3211 (void *)pv_api_op);
3212 break;
3213 case IVD_CMD_CTL_FLUSH:
3214 ret = ih264d_set_flush_mode(dec_hdl, (void *)pv_api_ip,
3215 (void *)pv_api_op);
3216 break;
3217 case IVD_CMD_CTL_GETBUFINFO:
3218 ret = ih264d_get_buf_info(dec_hdl, (void *)pv_api_ip,
3219 (void *)pv_api_op);
3220 break;
3221 case IVD_CMD_CTL_GETVERSION:
3222 ret = ih264d_get_version(dec_hdl, (void *)pv_api_ip,
3223 (void *)pv_api_op);
3224 break;
3225 case IH264D_CMD_CTL_DEGRADE:
3226 ret = ih264d_set_degrade(dec_hdl, (void *)pv_api_ip,
3227 (void *)pv_api_op);
3228 break;
3229
3230 case IH264D_CMD_CTL_SET_NUM_CORES:
3231 ret = ih264d_set_num_cores(dec_hdl, (void *)pv_api_ip,
3232 (void *)pv_api_op);
3233 break;
3234 case IH264D_CMD_CTL_GET_BUFFER_DIMENSIONS:
3235 ret = ih264d_get_frame_dimensions(dec_hdl, (void *)pv_api_ip,
3236 (void *)pv_api_op);
3237 break;
3238 case IH264D_CMD_CTL_SET_PROCESSOR:
3239 ret = ih264d_set_processor(dec_hdl, (void *)pv_api_ip,
3240 (void *)pv_api_op);
3241 break;
3242 default:
3243 H264_DEC_DEBUG_PRINT("\ndo nothing\n")
3244 ;
3245 break;
3246 }
3247
3248 return ret;
3249}
3250/*****************************************************************************/
3251/* */
3252/* Function Name : ih264d_rel_display_frame */
3253/* */
3254/* Description : */
3255/* */
3256/* Inputs :iv_obj_t decoder handle */
3257/* :pv_api_ip pointer to input structure */
3258/* :pv_api_op pointer to output structure */
3259/* Outputs : */
3260/* Returns : void */
3261/* */
3262/* Issues : none */
3263/* */
3264/* Revision History: */
3265/* */
3266/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3267/* 22 10 2008 100356 Draft */
3268/* */
3269/*****************************************************************************/
3270WORD32 ih264d_rel_display_frame(iv_obj_t *dec_hdl,
3271 void *pv_api_ip,
3272 void *pv_api_op)
3273{
3274
3275 ivd_rel_display_frame_ip_t *ps_rel_ip;
3276 ivd_rel_display_frame_op_t *ps_rel_op;
3277 UWORD32 buf_released = 0;
3278
3279 UWORD32 u4_ts = -1;
3280 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3281
3282 ps_rel_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
3283 ps_rel_op = (ivd_rel_display_frame_op_t *)pv_api_op;
3284 ps_rel_op->u4_error_code = 0;
3285 u4_ts = ps_rel_ip->u4_disp_buf_id;
3286
3287 if(0 == ps_dec->u4_share_disp_buf)
3288 {
3289 ps_dec->u4_disp_buf_mapping[u4_ts] = 0;
3290 ps_dec->u4_disp_buf_to_be_freed[u4_ts] = 0;
3291 return IV_SUCCESS;
3292 }
3293
3294 if(ps_dec->pv_pic_buf_mgr != NULL)
3295 {
3296 if(1 == ps_dec->u4_disp_buf_mapping[u4_ts])
3297 {
3298 ih264_buf_mgr_release((buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
3299 ps_rel_ip->u4_disp_buf_id,
3300 BUF_MGR_IO);
3301 ps_dec->u4_disp_buf_mapping[u4_ts] = 0;
3302 buf_released = 1;
3303 }
3304 }
3305
3306 if((1 == ps_dec->u4_share_disp_buf) && (0 == buf_released))
3307 ps_dec->u4_disp_buf_to_be_freed[u4_ts] = 1;
3308
3309 return IV_SUCCESS;
3310}
3311
3312/**
3313 *******************************************************************************
3314 *
3315 * @brief
3316 * Sets degrade params
3317 *
3318 * @par Description:
3319 * Sets degrade params.
3320 * Refer to ih264d_ctl_degrade_ip_t definition for details
3321 *
3322 * @param[in] ps_codec_obj
3323 * Pointer to codec object at API level
3324 *
3325 * @param[in] pv_api_ip
3326 * Pointer to input argument structure
3327 *
3328 * @param[out] pv_api_op
3329 * Pointer to output argument structure
3330 *
3331 * @returns Status
3332 *
3333 * @remarks
3334 *
3335 *
3336 *******************************************************************************
3337 */
3338
3339WORD32 ih264d_set_degrade(iv_obj_t *ps_codec_obj,
3340 void *pv_api_ip,
3341 void *pv_api_op)
3342{
3343 ih264d_ctl_degrade_ip_t *ps_ip;
3344 ih264d_ctl_degrade_op_t *ps_op;
3345 dec_struct_t *ps_codec = (dec_struct_t *)ps_codec_obj->pv_codec_handle;
3346
3347 ps_ip = (ih264d_ctl_degrade_ip_t *)pv_api_ip;
3348 ps_op = (ih264d_ctl_degrade_op_t *)pv_api_op;
3349
3350 ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
3351 ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
3352 ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
3353
3354 ps_op->u4_error_code = 0;
3355 ps_codec->i4_degrade_pic_cnt = 0;
3356
3357 return IV_SUCCESS;
3358}
3359
3360WORD32 ih264d_get_frame_dimensions(iv_obj_t *dec_hdl,
3361 void *pv_api_ip,
3362 void *pv_api_op)
3363{
3364 ih264d_ctl_get_frame_dimensions_ip_t *ps_ip;
3365 ih264d_ctl_get_frame_dimensions_op_t *ps_op;
3366 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3367 UWORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
3368
3369 ps_ip = (ih264d_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
3370
3371 ps_op = (ih264d_ctl_get_frame_dimensions_op_t *)pv_api_op;
3372 UNUSED(ps_ip);
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -07003373 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303374 {
3375 disp_wd = ps_dec->u2_disp_width;
3376 disp_ht = ps_dec->u2_disp_height;
3377
3378 if(0 == ps_dec->u4_share_disp_buf)
3379 {
3380 buffer_wd = disp_wd;
3381 buffer_ht = disp_ht;
3382 }
3383 else
3384 {
3385 buffer_wd = ps_dec->u2_frm_wd_y;
3386 buffer_ht = ps_dec->u2_frm_ht_y;
3387 }
3388 }
3389 else
3390 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +05303391 disp_wd = 0;
3392 disp_ht = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303393
3394 if(0 == ps_dec->u4_share_disp_buf)
3395 {
3396 buffer_wd = disp_wd;
3397 buffer_ht = disp_ht;
3398 }
3399 else
3400 {
3401 buffer_wd = ALIGN16(disp_wd) + (PAD_LEN_Y_H << 1);
3402 buffer_ht = ALIGN16(disp_ht) + (PAD_LEN_Y_V << 2);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303403 }
3404 }
3405 if(ps_dec->u4_app_disp_width > buffer_wd)
3406 buffer_wd = ps_dec->u4_app_disp_width;
3407
3408 if(0 == ps_dec->u4_share_disp_buf)
3409 {
3410 x_offset = 0;
3411 y_offset = 0;
3412 }
3413 else
3414 {
3415 y_offset = (PAD_LEN_Y_V << 1);
3416 x_offset = PAD_LEN_Y_H;
3417
3418 if((NULL != ps_dec->ps_sps) && (1 == (ps_dec->ps_sps->u1_is_valid))
3419 && (0 != ps_dec->u2_crop_offset_y))
3420 {
3421 y_offset += ps_dec->u2_crop_offset_y / ps_dec->u2_frm_wd_y;
3422 x_offset += ps_dec->u2_crop_offset_y % ps_dec->u2_frm_wd_y;
3423 }
3424 }
3425
3426 ps_op->u4_disp_wd[0] = disp_wd;
3427 ps_op->u4_disp_ht[0] = disp_ht;
3428 ps_op->u4_buffer_wd[0] = buffer_wd;
3429 ps_op->u4_buffer_ht[0] = buffer_ht;
3430 ps_op->u4_x_offset[0] = x_offset;
3431 ps_op->u4_y_offset[0] = y_offset;
3432
3433 ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
3434 >> 1);
3435 ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3436 >> 1);
3437 ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3438 >> 1);
3439 ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3440 >> 1);
3441 ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] =
3442 (ps_op->u4_x_offset[0] >> 1);
3443 ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] =
3444 (ps_op->u4_y_offset[0] >> 1);
3445
3446 if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
3447 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU))
3448 {
3449 ps_op->u4_disp_wd[2] = 0;
3450 ps_op->u4_disp_ht[2] = 0;
3451 ps_op->u4_buffer_wd[2] = 0;
3452 ps_op->u4_buffer_ht[2] = 0;
3453 ps_op->u4_x_offset[2] = 0;
3454 ps_op->u4_y_offset[2] = 0;
3455
3456 ps_op->u4_disp_wd[1] <<= 1;
3457 ps_op->u4_buffer_wd[1] <<= 1;
3458 ps_op->u4_x_offset[1] <<= 1;
3459 }
3460
3461 return IV_SUCCESS;
3462
3463}
3464
3465WORD32 ih264d_set_num_cores(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3466{
3467 ih264d_ctl_set_num_cores_ip_t *ps_ip;
3468 ih264d_ctl_set_num_cores_op_t *ps_op;
3469 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3470
3471 ps_ip = (ih264d_ctl_set_num_cores_ip_t *)pv_api_ip;
3472 ps_op = (ih264d_ctl_set_num_cores_op_t *)pv_api_op;
3473 ps_op->u4_error_code = 0;
3474 ps_dec->u4_num_cores = ps_ip->u4_num_cores;
3475 if(ps_dec->u4_num_cores == 1)
3476 {
3477 ps_dec->u1_separate_parse = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303478 }
3479 else
3480 {
3481 ps_dec->u1_separate_parse = 1;
3482 }
3483
3484 /*using only upto three threads currently*/
3485 if(ps_dec->u4_num_cores > 3)
3486 ps_dec->u4_num_cores = 3;
3487
3488 return IV_SUCCESS;
3489}
3490
3491void ih264d_fill_output_struct_from_context(dec_struct_t *ps_dec,
3492 ivd_video_decode_op_t *ps_dec_op)
3493{
3494 if((ps_dec_op->u4_error_code & 0xff)
3495 != ERROR_DYNAMIC_RESOLUTION_NOT_SUPPORTED)
3496 {
3497 ps_dec_op->u4_pic_wd = (UWORD32)ps_dec->u2_disp_width;
3498 ps_dec_op->u4_pic_ht = (UWORD32)ps_dec->u2_disp_height;
3499 }
3500 ps_dec_op->e_pic_type = ps_dec->i4_frametype;
3501
3502 ps_dec_op->u4_new_seq = 0;
3503 ps_dec_op->u4_output_present = ps_dec->u4_output_present;
3504 ps_dec_op->u4_progressive_frame_flag =
3505 ps_dec->s_disp_op.u4_progressive_frame_flag;
3506
3507 ps_dec_op->u4_is_ref_flag = 1;
3508 if(ps_dec_op->u4_frame_decoded_flag)
3509 {
3510 if(ps_dec->ps_cur_slice->u1_nal_ref_idc == 0)
3511 ps_dec_op->u4_is_ref_flag = 0;
3512 }
3513
3514 ps_dec_op->e_output_format = ps_dec->s_disp_op.e_output_format;
3515 ps_dec_op->s_disp_frm_buf = ps_dec->s_disp_op.s_disp_frm_buf;
3516 ps_dec_op->e4_fld_type = ps_dec->s_disp_op.e4_fld_type;
3517 ps_dec_op->u4_ts = ps_dec->s_disp_op.u4_ts;
3518 ps_dec_op->u4_disp_buf_id = ps_dec->s_disp_op.u4_disp_buf_id;
3519}
3520
3521/*****************************************************************************/
3522/* */
3523/* Function Name : ih264d_api_function */
3524/* */
3525/* Description : */
3526/* */
3527/* Inputs :iv_obj_t decoder handle */
3528/* :pv_api_ip pointer to input structure */
3529/* :pv_api_op pointer to output structure */
3530/* Outputs : */
3531/* Returns : void */
3532/* */
3533/* Issues : none */
3534/* */
3535/* Revision History: */
3536/* */
3537/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3538/* 22 10 2008 100356 Draft */
3539/* */
3540/*****************************************************************************/
3541IV_API_CALL_STATUS_T ih264d_api_function(iv_obj_t *dec_hdl,
3542 void *pv_api_ip,
3543 void *pv_api_op)
3544{
3545 UWORD32 command;
3546 UWORD32 *pu2_ptr_cmd;
3547 UWORD32 u4_api_ret;
3548 IV_API_CALL_STATUS_T e_status;
3549 e_status = api_check_struct_sanity(dec_hdl, pv_api_ip, pv_api_op);
3550
3551 if(e_status != IV_SUCCESS)
3552 {
3553 UWORD32 *ptr_err;
3554
3555 ptr_err = (UWORD32 *)pv_api_op;
3556 UNUSED(ptr_err);
3557 H264_DEC_DEBUG_PRINT("error code = %d\n", *(ptr_err + 1));
3558 return IV_FAIL;
3559 }
3560
3561 pu2_ptr_cmd = (UWORD32 *)pv_api_ip;
3562 pu2_ptr_cmd++;
3563
3564 command = *pu2_ptr_cmd;
3565// H264_DEC_DEBUG_PRINT("inside lib = %d\n",command);
3566 switch(command)
3567 {
3568
Harish Mahendrakar251b0072015-08-04 09:55:15 +05303569 case IVD_CMD_CREATE:
3570 u4_api_ret = ih264d_create(dec_hdl, (void *)pv_api_ip,
3571 (void *)pv_api_op);
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303572 break;
Harish Mahendrakar251b0072015-08-04 09:55:15 +05303573 case IVD_CMD_DELETE:
3574 u4_api_ret = ih264d_delete(dec_hdl, (void *)pv_api_ip,
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303575 (void *)pv_api_op);
3576 break;
3577
3578 case IVD_CMD_VIDEO_DECODE:
3579 u4_api_ret = ih264d_video_decode(dec_hdl, (void *)pv_api_ip,
3580 (void *)pv_api_op);
3581 break;
3582
3583 case IVD_CMD_GET_DISPLAY_FRAME:
3584 u4_api_ret = ih264d_get_display_frame(dec_hdl, (void *)pv_api_ip,
3585 (void *)pv_api_op);
3586
3587 break;
3588
3589 case IVD_CMD_SET_DISPLAY_FRAME:
3590 u4_api_ret = ih264d_set_display_frame(dec_hdl, (void *)pv_api_ip,
3591 (void *)pv_api_op);
3592
3593 break;
3594
3595 case IVD_CMD_REL_DISPLAY_FRAME:
3596 u4_api_ret = ih264d_rel_display_frame(dec_hdl, (void *)pv_api_ip,
3597 (void *)pv_api_op);
3598 break;
3599
Hamsalekha S8d3d3032015-03-13 21:24:58 +05303600 case IVD_CMD_VIDEO_CTL:
3601 u4_api_ret = ih264d_ctl(dec_hdl, (void *)pv_api_ip,
3602 (void *)pv_api_op);
3603 break;
3604 default:
3605 u4_api_ret = IV_FAIL;
3606 break;
3607 }
3608
3609 return u4_api_ret;
3610}