[MIPS] Fix memory barriers for atomic operations.

Add barriers using MIPS 'sync' instructions as needed for SMP
systems.

BUG=246947

Review URL: https://chromiumcodereview.appspot.com/16001009

git-svn-id: svn://svn.chromium.org/chrome/trunk/src@204697 0039d316-1c4b-4281-b951-d872f2087c98


CrOS-Libchrome-Original-Commit: fc47526241e2367035b107f853c89e27573304ff
1 file changed
tree: 2a49578896d1c818f8fd9bc32794a9ba3984674e
  1. base/
  2. build/
  3. dbus/
  4. ipc/
  5. testing/
  6. third_party/