petarj@mips.com | d3a3e76 | 2012-06-18 11:47:05 +0900 | [diff] [blame] | 1 | // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
license.bot | f003cfe | 2008-08-24 09:55:55 +0900 | [diff] [blame] | 2 | // Use of this source code is governed by a BSD-style license that can be |
| 3 | // found in the LICENSE file. |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 4 | |
| 5 | // For atomic operations on reference counts, see atomic_refcount.h. |
| 6 | // For atomic operations on sequence numbers, see atomic_sequence_num.h. |
| 7 | |
| 8 | // The routines exported by this module are subtle. If you use them, even if |
| 9 | // you get the code right, it will depend on careful reasoning about atomicity |
| 10 | // and memory ordering; it will be less readable, and harder to maintain. If |
| 11 | // you plan to use these routines, you should have a good reason, such as solid |
| 12 | // evidence that performance would otherwise suffer, or there being no |
| 13 | // alternative. You should assume only properties explicitly guaranteed by the |
| 14 | // specifications in this file. You are almost certainly _not_ writing code |
| 15 | // just for the x86; if you assume x86 semantics, x86 hardware bugs and |
| 16 | // implementations on other archtectures will cause your code to break. If you |
| 17 | // do not know what you are doing, avoid these routines, and use a Mutex. |
| 18 | // |
| 19 | // It is incorrect to make direct assignments to/from an atomic variable. |
| 20 | // You should use one of the Load or Store routines. The NoBarrier |
| 21 | // versions are provided when no barriers are needed: |
| 22 | // NoBarrier_Store() |
| 23 | // NoBarrier_Load() |
| 24 | // Although there are currently no compiler enforcement, you are encouraged |
| 25 | // to use these. |
| 26 | // |
| 27 | |
| 28 | #ifndef BASE_ATOMICOPS_H_ |
| 29 | #define BASE_ATOMICOPS_H_ |
| 30 | |
| 31 | #include "base/basictypes.h" |
jhawkins@chromium.org | 8e73d06 | 2011-04-05 03:04:37 +0900 | [diff] [blame] | 32 | #include "build/build_config.h" |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 33 | |
| 34 | namespace base { |
| 35 | namespace subtle { |
| 36 | |
evan@chromium.org | 05ef52b | 2011-07-29 01:51:25 +0900 | [diff] [blame] | 37 | typedef int32 Atomic32; |
deanm@chromium.org | dc8b492 | 2009-07-28 06:17:23 +0900 | [diff] [blame] | 38 | #ifdef ARCH_CPU_64_BITS |
| 39 | // We need to be able to go between Atomic64 and AtomicWord implicitly. This |
| 40 | // means Atomic64 and AtomicWord should be the same type on 64-bit. |
abarth@chromium.org | e30d170 | 2010-12-01 16:34:58 +0900 | [diff] [blame] | 41 | #if defined(OS_NACL) |
| 42 | // NaCl's intptr_t is not actually 64-bits on 64-bit! |
| 43 | // http://code.google.com/p/nativeclient/issues/detail?id=1162 |
| 44 | typedef int64_t Atomic64; |
| 45 | #else |
deanm@chromium.org | dc8b492 | 2009-07-28 06:17:23 +0900 | [diff] [blame] | 46 | typedef intptr_t Atomic64; |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 47 | #endif |
abarth@chromium.org | e30d170 | 2010-12-01 16:34:58 +0900 | [diff] [blame] | 48 | #endif |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 49 | |
| 50 | // Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or |
| 51 | // Atomic64 routines below, depending on your architecture. |
| 52 | typedef intptr_t AtomicWord; |
| 53 | |
| 54 | // Atomically execute: |
| 55 | // result = *ptr; |
| 56 | // if (*ptr == old_value) |
| 57 | // *ptr = new_value; |
| 58 | // return result; |
| 59 | // |
| 60 | // I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value". |
| 61 | // Always return the old value of "*ptr" |
| 62 | // |
| 63 | // This routine implies no memory barriers. |
| 64 | Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, |
| 65 | Atomic32 old_value, |
| 66 | Atomic32 new_value); |
| 67 | |
| 68 | // Atomically store new_value into *ptr, returning the previous value held in |
| 69 | // *ptr. This routine implies no memory barriers. |
| 70 | Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, Atomic32 new_value); |
| 71 | |
| 72 | // Atomically increment *ptr by "increment". Returns the new value of |
| 73 | // *ptr with the increment applied. This routine implies no memory barriers. |
| 74 | Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, Atomic32 increment); |
| 75 | |
| 76 | Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, |
| 77 | Atomic32 increment); |
| 78 | |
| 79 | // These following lower-level operations are typically useful only to people |
| 80 | // implementing higher-level synchronization operations like spinlocks, |
| 81 | // mutexes, and condition-variables. They combine CompareAndSwap(), a load, or |
| 82 | // a store with appropriate memory-ordering instructions. "Acquire" operations |
| 83 | // ensure that no later memory access can be reordered ahead of the operation. |
| 84 | // "Release" operations ensure that no previous memory access can be reordered |
| 85 | // after the operation. "Barrier" operations have both "Acquire" and "Release" |
| 86 | // semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory |
| 87 | // access. |
| 88 | Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, |
| 89 | Atomic32 old_value, |
| 90 | Atomic32 new_value); |
| 91 | Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, |
| 92 | Atomic32 old_value, |
| 93 | Atomic32 new_value); |
| 94 | |
| 95 | void MemoryBarrier(); |
| 96 | void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value); |
| 97 | void Acquire_Store(volatile Atomic32* ptr, Atomic32 value); |
| 98 | void Release_Store(volatile Atomic32* ptr, Atomic32 value); |
| 99 | |
| 100 | Atomic32 NoBarrier_Load(volatile const Atomic32* ptr); |
| 101 | Atomic32 Acquire_Load(volatile const Atomic32* ptr); |
| 102 | Atomic32 Release_Load(volatile const Atomic32* ptr); |
| 103 | |
| 104 | // 64-bit atomic operations (only available on 64-bit processors). |
deanm@chromium.org | dc8b492 | 2009-07-28 06:17:23 +0900 | [diff] [blame] | 105 | #ifdef ARCH_CPU_64_BITS |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 106 | Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr, |
| 107 | Atomic64 old_value, |
| 108 | Atomic64 new_value); |
| 109 | Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value); |
| 110 | Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); |
| 111 | Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); |
| 112 | |
| 113 | Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, |
| 114 | Atomic64 old_value, |
| 115 | Atomic64 new_value); |
| 116 | Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, |
| 117 | Atomic64 old_value, |
| 118 | Atomic64 new_value); |
| 119 | void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value); |
| 120 | void Acquire_Store(volatile Atomic64* ptr, Atomic64 value); |
| 121 | void Release_Store(volatile Atomic64* ptr, Atomic64 value); |
| 122 | Atomic64 NoBarrier_Load(volatile const Atomic64* ptr); |
| 123 | Atomic64 Acquire_Load(volatile const Atomic64* ptr); |
| 124 | Atomic64 Release_Load(volatile const Atomic64* ptr); |
deanm@chromium.org | dc8b492 | 2009-07-28 06:17:23 +0900 | [diff] [blame] | 125 | #endif // ARCH_CPU_64_BITS |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 126 | |
| 127 | } // namespace base::subtle |
| 128 | } // namespace base |
| 129 | |
| 130 | // Include our platform specific implementation. |
deanm@google.com | 30bbf75 | 2008-08-05 22:01:35 +0900 | [diff] [blame] | 131 | #if defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY) |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 132 | #include "base/atomicops_internals_x86_msvc.h" |
leng@chromium.org | 98cd05c | 2012-07-14 01:49:44 +0900 | [diff] [blame^] | 133 | #elif defined(OS_MACOSX) |
| 134 | #include "base/atomicops_internals_mac.h" |
deanm@google.com | 30bbf75 | 2008-08-05 22:01:35 +0900 | [diff] [blame] | 135 | #elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY) |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 136 | #include "base/atomicops_internals_x86_gcc.h" |
thestig@chromium.org | 569de14 | 2009-05-02 02:57:09 +0900 | [diff] [blame] | 137 | #elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARM_FAMILY) |
| 138 | #include "base/atomicops_internals_arm_gcc.h" |
petarj@mips.com | d3a3e76 | 2012-06-18 11:47:05 +0900 | [diff] [blame] | 139 | #elif defined(COMPILER_GCC) && defined(ARCH_CPU_MIPS_FAMILY) |
| 140 | #include "base/atomicops_internals_mips_gcc.h" |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 141 | #else |
| 142 | #error "Atomic operations are not supported on your platform" |
| 143 | #endif |
| 144 | |
phajdan.jr@chromium.org | 22b86ac | 2011-04-15 15:15:04 +0900 | [diff] [blame] | 145 | // On some platforms we need additional declarations to make |
| 146 | // AtomicWord compatible with our other Atomic* types. |
| 147 | #if defined(OS_MACOSX) || defined(OS_OPENBSD) |
| 148 | #include "base/atomicops_internals_atomicword_compat.h" |
| 149 | #endif |
| 150 | |
deanm@google.com | 1579ec7 | 2008-08-05 18:57:36 +0900 | [diff] [blame] | 151 | #endif // BASE_ATOMICOPS_H_ |