commit cad0e03f5a616fabc276f5195353bff1f8a31669
author Ben Widawsky <benjamin.widawsky@intel.com> Thu Oct 22 12:15:50 2015 -0700
committer Ben Widawsky <benjamin.widawsky@intel.com> Tue Nov 03 11:19:06 2015 -0800
tree 4758b7be08ccafa1ae745bc943838ba46d23de7c
parent b176372af4c773de188fae67e334e2a83c5706e3

intel: Add SKL GT4 PCI IDs

Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

intel/intel_chipset.h

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 253ea71..64f8104 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -177,9 +177,13 @@
 #define PCI_CHIP_SKYLAKE_HALO_GT3	0x192B
 #define PCI_CHIP_SKYLAKE_HALO_GT1 	0x190B
 #define PCI_CHIP_SKYLAKE_SRV_GT2	0x191A
-#define PCI_CHIP_SKYLAKE_SRV_GT3	0x192A
 #define PCI_CHIP_SKYLAKE_SRV_GT1	0x190A
 #define PCI_CHIP_SKYLAKE_WKS_GT2 	0x191D
+#define PCI_CHIP_SKYLAKE_SRV_GT4	0x192A
+#define PCI_CHIP_SKYLAKE_DT_GT4		0x1932
+#define PCI_CHIP_SKYLAKE_SRV_GT4X	0x193A
+#define PCI_CHIP_SKYLAKE_H_GT4		0x193B
+#define PCI_CHIP_SKYLAKE_WKS_GT4	0x193D
 
 #define PCI_CHIP_BROXTON_0		0x0A84
 #define PCI_CHIP_BROXTON_1		0x1A84
@@ -359,12 +363,18 @@
 				 (devid) == PCI_CHIP_SKYLAKE_WKS_GT2)
 
 #define IS_SKL_GT3(devid)	((devid) == PCI_CHIP_SKYLAKE_ULT_GT3	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT3	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
+				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT3)
+
+#define IS_SKL_GT4(devid)	((devid) == PCI_CHIP_SKYLAKE_SRV_GT4	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_DT_GT4	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT4X	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_H_GT4	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_WKS_GT4)
 
 #define IS_SKYLAKE(devid)	(IS_SKL_GT1(devid) || \
 				 IS_SKL_GT2(devid) || \
-				 IS_SKL_GT3(devid))
+				 IS_SKL_GT3(devid) || \
+				 IS_SKL_GT4(devid))
 
 #define IS_BROXTON(devid)	((devid) == PCI_CHIP_BROXTON_0	|| \
 				 (devid) == PCI_CHIP_BROXTON_1	|| \