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Rob Clark06eaf092012-04-03 16:44:43 -05001/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
Rob Clarkef1b9582012-03-28 14:39:43 -05003/*
Rob Clark06eaf092012-04-03 16:44:43 -05004 * Copyright (C) 2011 Texas Instruments, Inc
Rob Clarkef1b9582012-03-28 14:39:43 -05005 *
Rob Clark06eaf092012-04-03 16:44:43 -05006 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
Rob Clarkef1b9582012-03-28 14:39:43 -050012 *
Rob Clark06eaf092012-04-03 16:44:43 -050013 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
Rob Clarkef1b9582012-03-28 14:39:43 -050016 *
Rob Clark06eaf092012-04-03 16:44:43 -050017 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
Rob Clarkef1b9582012-03-28 14:39:43 -050024 *
Rob Clark06eaf092012-04-03 16:44:43 -050025 * Authors:
26 * Rob Clark <rob@ti.com>
Rob Clarkef1b9582012-03-28 14:39:43 -050027 */
28
29#ifndef __OMAP_DRM_H__
30#define __OMAP_DRM_H__
31
Víctor Manuel Jáquez Lealf215d652012-08-09 13:34:54 +020032#include <stdint.h>
33#include <drm.h>
Rob Clarkef1b9582012-03-28 14:39:43 -050034
35/* Please note that modifications to all structs defined here are
36 * subject to backwards-compatibility constraints.
37 */
38
39#define OMAP_PARAM_CHIPSET_ID 1 /* ie. 0x3430, 0x4430, etc */
40
41struct drm_omap_param {
42 uint64_t param; /* in */
43 uint64_t value; /* in (set_param), out (get_param) */
44};
45
46struct drm_omap_get_base {
47 char plugin_name[64]; /* in */
48 uint32_t ioctl_base; /* out */
49 uint32_t __pad;
50};
51
52#define OMAP_BO_SCANOUT 0x00000001 /* scanout capable (phys contiguous) */
53#define OMAP_BO_CACHE_MASK 0x00000006 /* cache type mask, see cache modes */
54#define OMAP_BO_TILED_MASK 0x00000f00 /* tiled mapping mask, see tiled modes */
55
56/* cache modes */
57#define OMAP_BO_CACHED 0x00000000 /* default */
58#define OMAP_BO_WC 0x00000002 /* write-combine */
59#define OMAP_BO_UNCACHED 0x00000004 /* strongly-ordered (uncached) */
60
61/* tiled modes */
62#define OMAP_BO_TILED_8 0x00000100
63#define OMAP_BO_TILED_16 0x00000200
64#define OMAP_BO_TILED_32 0x00000300
65#define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)
66
67union omap_gem_size {
68 uint32_t bytes; /* (for non-tiled formats) */
69 struct {
70 uint16_t width;
71 uint16_t height;
72 } tiled; /* (for tiled formats) */
73};
74
75struct drm_omap_gem_new {
76 union omap_gem_size size; /* in */
77 uint32_t flags; /* in */
78 uint32_t handle; /* out */
79 uint32_t __pad;
80};
81
82/* mask of operations: */
83enum omap_gem_op {
84 OMAP_GEM_READ = 0x01,
85 OMAP_GEM_WRITE = 0x02,
86};
87
88struct drm_omap_gem_cpu_prep {
89 uint32_t handle; /* buffer handle (in) */
90 uint32_t op; /* mask of omap_gem_op (in) */
91};
92
93struct drm_omap_gem_cpu_fini {
94 uint32_t handle; /* buffer handle (in) */
95 uint32_t op; /* mask of omap_gem_op (in) */
96 /* TODO maybe here we pass down info about what regions are touched
97 * by sw so we can be clever about cache ops? For now a placeholder,
98 * set to zero and we just do full buffer flush..
99 */
100 uint32_t nregions;
101 uint32_t __pad;
102};
103
104struct drm_omap_gem_info {
105 uint32_t handle; /* buffer handle (in) */
106 uint32_t pad;
107 uint64_t offset; /* mmap offset (out) */
108 /* note: in case of tiled buffers, the user virtual size can be
109 * different from the physical size (ie. how many pages are needed
110 * to back the object) which is returned in DRM_IOCTL_GEM_OPEN..
111 * This size here is the one that should be used if you want to
112 * mmap() the buffer:
113 */
114 uint32_t size; /* virtual size for mmap'ing (out) */
115 uint32_t __pad;
116};
117
118#define DRM_OMAP_GET_PARAM 0x00
119#define DRM_OMAP_SET_PARAM 0x01
120#define DRM_OMAP_GET_BASE 0x02
121#define DRM_OMAP_GEM_NEW 0x03
122#define DRM_OMAP_GEM_CPU_PREP 0x04
123#define DRM_OMAP_GEM_CPU_FINI 0x05
124#define DRM_OMAP_GEM_INFO 0x06
125#define DRM_OMAP_NUM_IOCTLS 0x07
126
127#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
128#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
129#define DRM_IOCTL_OMAP_GET_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_BASE, struct drm_omap_get_base)
130#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
131#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
132#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
133#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
134
135#endif /* __OMAP_DRM_H__ */