Clean up and refactor; new hw support

(Originally, https://android-review.googlesource.com/#/c/341550/)

This change addresses portability, a pn80t platform abstraction, and
nq-nci support.

Refactor/clean up:
- Adds darwin-sysdeps.c to help avoid reverting again.
- Clean up Android.bp
- T=1: moved T=1 to using bit_specs to keep some
  of the readability of bitfields without incurring
  weird toolchain side effects.
- T=1 will still rely on compilers keeping uchars
  aligned and check it with a div-by-zero build
  assertion.
- ESE platform specific methods are now wrapped.
- Adjusted error message constant usage.
- Enclosing {} for every if statement.
- Moved to relative headers for inclusion into other code
  bases.
- Added a comment to log.h to make debugging easier globally
  in libese code.

PN80T:
- Common code now shared across different
  wire configurations.
- Add support for kernel based driver (called nq-nci)
  which interacts with the nq-nci behavior for power
  management.
- Added cooldown/end of session code to pn80t/common.c
- Migrated the ese_nxp_sample code to NQ_NCI and added the empty
  session to test the cooldown code submission.

Bug: 34193473,35105409
Change-Id: I8fc320c8c236282ed103ef3ee3cb8c0dc99d8bcb
Test: unittests pass, tested ese-relay on hardware forwarding globalplatform pro
diff --git a/libese-teq1/tests/teq1_unittests.cpp b/libese-teq1/tests/teq1_unittests.cpp
index 77118fa..aef5e0a 100644
--- a/libese-teq1/tests/teq1_unittests.cpp
+++ b/libese-teq1/tests/teq1_unittests.cpp
@@ -36,7 +36,6 @@
 // - Unittests of each function
 // - teq1_rules matches Annex A of ISO 7816-3
 
-
 // Tests teq1_frame_error_check to avoid testing every combo that
 // ends in 255 in the rule engine.
 class Teq1FrameErrorCheck : public virtual Test {
@@ -60,16 +59,16 @@
   /* The PCBs above are all valid for a sent unchained I block with advancing
    * sequence #s.
    */
-  tx_frame_.header.PCB.val = TEQ1_I(0, 0);
+  tx_frame_.header.PCB = TEQ1_I(0, 0);
   state_.card_state = &card_state_;
   state_.card_state->seq.card = 1;
   while (*pcb != 255) {
-    rx_frame_.header.PCB.val = *pcb;
+    rx_frame_.header.PCB = *pcb;
     rx_frame_.header.LEN = 2;
     rx_frame_.INF[0] = 'A';
     rx_frame_.INF[1] = 'B';
     rx_frame_.INF[2] = teq1_compute_LRC(&rx_frame_);
-    EXPECT_EQ(0, teq1_frame_error_check(&state_, &tx_frame_, &rx_frame_)) << teq1_pcb_to_name(rx_frame_.header.PCB.val);
+    EXPECT_EQ(0, teq1_frame_error_check(&state_, &tx_frame_, &rx_frame_)) << teq1_pcb_to_name(rx_frame_.header.PCB);
     rx_frame_.INF[2] = teq1_compute_LRC(&rx_frame_) - 1;
     // Reset so we check the LRC error instead of a wrong seq.
     state_.card_state->seq.card = !state_.card_state->seq.card;
@@ -94,8 +93,9 @@
     tx_data_(INF_LEN, 'A'),
     rx_data_(INF_LEN, 'B'),
     card_state_({ .seq = { .card = 1, .interface = 1, }, }),
-    state_(TEQ1_INIT_STATE(tx_data_.data(), tx_data_.size(),
-                           rx_data_.data(), rx_data_.size(), &card_state_)) {
+    state_(TEQ1_INIT_STATE(tx_data_.data(), static_cast<uint32_t>(tx_data_.size()),
+                           rx_data_.data(), static_cast<uint32_t>(rx_data_.size()),
+                           &card_state_)) {
     memset(&tx_frame_, 0, sizeof(struct Teq1Frame));
     memset(&tx_next_, 0, sizeof(struct Teq1Frame));
     memset(&rx_frame_, 0, sizeof(struct Teq1Frame));
@@ -122,12 +122,12 @@
 class Teq1CompleteTest : public Teq1ErrorFreeTest {
  public:
   virtual void SetUp() {
-    tx_frame_.header.PCB.val = TEQ1_I(0, 0);
+    tx_frame_.header.PCB = TEQ1_I(0, 0);
     teq1_fill_info_block(&state_, &tx_frame_);
     // Check that the tx_data was fully consumed.
     EXPECT_EQ(0UL, state_.app_data.tx_len);
 
-    rx_frame_.header.PCB.val = TEQ1_I(0, 0);
+    rx_frame_.header.PCB = TEQ1_I(0, 0);
     rx_frame_.header.LEN = INF_LEN;
     ASSERT_EQ(static_cast<unsigned long>(INF_LEN), tx_data_.size());  // Catch fixture changes.
     // Supply TX data and make sure it overwrites RX data on consumption.
@@ -137,15 +137,15 @@
 
   virtual void RunRules() {
     teq1_trace_header();
-    teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
-    teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
+    teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
+    teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
 
     enum RuleResult result = teq1_rules(&state_,  &tx_frame_, &rx_frame_, &tx_next_);
     EXPECT_EQ(0, state_.errors);
     EXPECT_EQ(NULL,  state_.last_error_message)
       << "Last error: " << state_.last_error_message;
-    EXPECT_EQ(0, tx_next_.header.PCB.val)
-      << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
+    EXPECT_EQ(0, tx_next_.header.PCB)
+      << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
     EXPECT_EQ(kRuleResultComplete, result)
      << "Actual result name: " << teq1_rule_result_to_name(result);
   }
@@ -171,8 +171,8 @@
 };
 
 TEST_F(Teq1CompleteTest, I10_I10_data) {
-  tx_frame_.header.PCB.val = TEQ1_I(1, 0);
-  rx_frame_.header.PCB.val = TEQ1_I(0, 0);
+  tx_frame_.header.PCB = TEQ1_I(1, 0);
+  rx_frame_.header.PCB = TEQ1_I(0, 0);
   rx_frame_.INF[INF_LEN] = teq1_compute_LRC(&rx_frame_);
   RunRules();
   // Ensure that the rx_frame data was copied out to rx_data.
@@ -184,28 +184,28 @@
 // Note, IFS is not tested as it is not supported on current hardware.
 
 TEST_F(Teq1ErrorFreeTest, I00_WTX0_WTX1_data) {
-  tx_frame_.header.PCB.val = TEQ1_I(0, 0);
+  tx_frame_.header.PCB = TEQ1_I(0, 0);
   teq1_fill_info_block(&state_, &tx_frame_);
   // Check that the tx_data was fully consumed.
   EXPECT_EQ(0UL, state_.app_data.tx_len);
 
-  rx_frame_.header.PCB.val = TEQ1_S_WTX(0);
+  rx_frame_.header.PCB = TEQ1_S_WTX(0);
   rx_frame_.header.LEN = 1;
   rx_frame_.INF[0] = 2; /* Wait x 2 */
   rx_frame_.INF[1] = teq1_compute_LRC(&rx_frame_);
 
   teq1_trace_header();
-  teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
-  teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
+  teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
+  teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
 
   enum RuleResult result = teq1_rules(&state_,  &tx_frame_, &rx_frame_, &tx_next_);
-  teq1_trace_transmit(tx_next_.header.PCB.val, tx_next_.header.LEN);
+  teq1_trace_transmit(tx_next_.header.PCB, tx_next_.header.LEN);
 
   EXPECT_EQ(0, state_.errors);
   EXPECT_EQ(NULL,  state_.last_error_message)
     << "Last error: " << state_.last_error_message;
-  EXPECT_EQ(TEQ1_S_WTX(1), tx_next_.header.PCB.val)
-    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
+  EXPECT_EQ(TEQ1_S_WTX(1), tx_next_.header.PCB)
+    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
   EXPECT_EQ(state_.wait_mult, 2);
   EXPECT_EQ(state_.wait_mult, rx_frame_.INF[0]);
   // Ensure the next call will use the original TX frame.
@@ -221,9 +221,9 @@
     state_.app_data.tx_buf = tx_data_.data();
     teq1_fill_info_block(&state_, &tx_frame_);
     // Ensure More bit was set.
-    EXPECT_EQ(1, tx_frame_.header.PCB.I.more_data);
+    EXPECT_EQ(1, bs_get(PCB.I.more_data, tx_frame_.header.PCB));
     // Check that the tx_data was fully consumed.
-    EXPECT_EQ(static_cast<size_t>(oversized_data_len_ - INF_LEN),
+    EXPECT_EQ(static_cast<uint32_t>(oversized_data_len_ - INF_LEN),
               state_.app_data.tx_len);
     // No one is checking the TX LRC since there is no card present.
 
@@ -231,11 +231,11 @@
     rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
 
     teq1_trace_header();
-    teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
-    teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
+    teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
+    teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
 
     enum RuleResult result = teq1_rules(&state_,  &tx_frame_, &rx_frame_, &tx_next_);
-    teq1_trace_transmit(tx_next_.header.PCB.val, tx_next_.header.LEN);
+    teq1_trace_transmit(tx_next_.header.PCB, tx_next_.header.LEN);
     EXPECT_EQ(0, state_.errors);
     EXPECT_EQ(NULL,  state_.last_error_message)
       << "Last error: " << state_.last_error_message;
@@ -243,7 +243,7 @@
       << "Actual result name: " << teq1_rule_result_to_name(result);
     // Check that the tx_buf was drained already for the next frame.
     // ...
-    EXPECT_EQ(static_cast<size_t>(oversized_data_len_ - (2 * INF_LEN)),
+    EXPECT_EQ(static_cast<uint32_t>(oversized_data_len_ - (2 * INF_LEN)),
               state_.app_data.tx_len);
     // Belt and suspenders: make sure no RX buf was used.
     EXPECT_EQ(rx_data_.size(), state_.app_data.rx_len);
@@ -253,29 +253,29 @@
 
 TEST_F(Teq1ErrorFreeChainingTest, I01_R1_I11_chaining) {
   oversized_data_len_ = INF_LEN * 3;
-  tx_frame_.header.PCB.val = TEQ1_I(0, 0);
-  rx_frame_.header.PCB.val = TEQ1_R(1, 0, 0);
+  tx_frame_.header.PCB = TEQ1_I(0, 0);
+  rx_frame_.header.PCB = TEQ1_R(1, 0, 0);
   RunRules();
-  EXPECT_EQ(TEQ1_I(1, 1), tx_next_.header.PCB.val)
-    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
+  EXPECT_EQ(TEQ1_I(1, 1), tx_next_.header.PCB)
+    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
 };
 
 TEST_F(Teq1ErrorFreeChainingTest, I11_R0_I01_chaining) {
   oversized_data_len_ = INF_LEN * 3;
-  tx_frame_.header.PCB.val = TEQ1_I(1, 0);
-  rx_frame_.header.PCB.val = TEQ1_R(0, 0, 0);
+  tx_frame_.header.PCB = TEQ1_I(1, 0);
+  rx_frame_.header.PCB = TEQ1_R(0, 0, 0);
   RunRules();
-  EXPECT_EQ(TEQ1_I(0, 1), tx_next_.header.PCB.val)
-    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
+  EXPECT_EQ(TEQ1_I(0, 1), tx_next_.header.PCB)
+    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
 };
 
 TEST_F(Teq1ErrorFreeChainingTest, I11_R0_I00_chaining) {
   oversized_data_len_ = INF_LEN * 2;  // Exactly 2 frames worth.
-  tx_frame_.header.PCB.val = TEQ1_I(1, 0);
-  rx_frame_.header.PCB.val = TEQ1_R(0, 0, 0);
+  tx_frame_.header.PCB = TEQ1_I(1, 0);
+  rx_frame_.header.PCB = TEQ1_R(0, 0, 0);
   RunRules();
-  EXPECT_EQ(TEQ1_I(0, 0), tx_next_.header.PCB.val)
-    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
+  EXPECT_EQ(TEQ1_I(0, 0), tx_next_.header.PCB)
+    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
 };
 
 //
@@ -290,19 +290,19 @@
     state_.app_data.rx_len = 0;
     state_.app_data.tx_len = 0;
 
-    tx_frame_.header.PCB.val = TEQ1_I(0, 0);
+    tx_frame_.header.PCB = TEQ1_I(0, 0);
     teq1_fill_info_block(&state_, &tx_frame_);
     // No one is checking the TX LRC since there is no card present.
 
     // Assume the card may not even set the error bit.
     rx_frame_.header.LEN = 0;
-    rx_frame_.header.PCB.val = TEQ1_R(0, 0, 0);
+    rx_frame_.header.PCB = TEQ1_R(0, 0, 0);
     rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
   }
   virtual void TearDown() {
     teq1_trace_header();
-    teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
-    teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
+    teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
+    teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
 
     enum RuleResult result = teq1_rules(&state_,  &tx_frame_, &rx_frame_, &tx_next_);
     // Not counted as an error as it was on the card-side.
@@ -315,22 +315,22 @@
 };
 
 TEST_F(Teq1Retransmit, I00_R000_I00) {
-  rx_frame_.header.PCB.val = TEQ1_R(0, 0, 0);
+  rx_frame_.header.PCB = TEQ1_R(0, 0, 0);
   rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
 };
 
 TEST_F(Teq1Retransmit, I00_R001_I00) {
-  rx_frame_.header.PCB.val = TEQ1_R(0, 0, 1);
+  rx_frame_.header.PCB = TEQ1_R(0, 0, 1);
   rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
 };
 
 TEST_F(Teq1Retransmit, I00_R010_I00) {
-  rx_frame_.header.PCB.val = TEQ1_R(0, 1, 0);
+  rx_frame_.header.PCB = TEQ1_R(0, 1, 0);
   rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
 };
 
 TEST_F(Teq1Retransmit, I00_R011_I00) {
-  rx_frame_.header.PCB.val = TEQ1_R(0, 1, 1);
+  rx_frame_.header.PCB = TEQ1_R(0, 1, 1);
   rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
 }
 
@@ -339,25 +339,25 @@
   state_.app_data.rx_len = 0;
   state_.app_data.tx_len = 0;
 
-  tx_frame_.header.PCB.val = TEQ1_I(0, 0);
+  tx_frame_.header.PCB = TEQ1_I(0, 0);
   teq1_fill_info_block(&state_, &tx_frame_);
   // No one is checking the TX LRC since there is no card present.
 
-  rx_frame_.header.PCB.val = TEQ1_I(0, 0);
+  rx_frame_.header.PCB = TEQ1_I(0, 0);
   rx_frame_.header.LEN = 0;
   rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_) - 1;
 
   teq1_trace_header();
-  teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
-  teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
+  teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
+  teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
 
   enum RuleResult result = teq1_rules(&state_,  &tx_frame_, &rx_frame_, &tx_next_);
   EXPECT_EQ(1, state_.errors);
   const char *kNull = NULL;
   EXPECT_NE(kNull, state_.last_error_message);
   EXPECT_STREQ("Invalid frame received", state_.last_error_message);
-  EXPECT_EQ(TEQ1_R(0, 0, 1), tx_next_.header.PCB.val)
-    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
+  EXPECT_EQ(TEQ1_R(0, 0, 1), tx_next_.header.PCB)
+    << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
   EXPECT_EQ(kRuleResultSingleShot, result)
    << "Actual result name: " << teq1_rule_result_to_name(result);
 };