1. 056536f Win/x64: Fix improper callee save of xmm8-xmm11 by DRC · 8 years ago
  2. bd49803 Use consistent/modern code formatting for pointers by DRC · 8 years ago
  3. 8632f1b ARM64: Avoid tbl instruction on Cortex-A53/A57 by DRC · 8 years ago
  4. 28f00bf Fix iOS/ARMv8 build by DRC · 8 years ago
  5. 53c635b Fix 'make dist'; Include LICENSE.md in packages by DRC · 8 years ago
  6. 46ecffa ARM64: Avoid LD3/ST3 at run time, not compile time by DRC · 8 years ago
  7. 219470d ARM64 NEON SIMD implementation of Huffman encoding by DRC · 8 years ago
  8. 15aaa7f ARM SIMD: Comment tweaks by DRC · 8 years ago
  9. cf88848 Use consistent formatting in ARM NEON SIMD code by DRC · 8 years ago
  10. cb49bb0 Opt. ARM64 SIMD decompr. for in-order pipelines by DRC · 8 years ago
  11. d38b4f2 Optimize ARM64 SIMD code for Cavium ThunderX by DRC · 9 years ago
  12. e8aa5fa Add JSIMD_NOHUFFENC environment variable for ARM by DRC · 9 years ago
  13. ec6941f Complete the ARM64 NEON SIMD implementation by DRC · 9 years ago
  14. 499c470 ARM32 NEON SIMD implementation of Huffman encoding by DRC · 9 years ago
  15. f3a8684 SSE2 SIMD implementation of Huffman encoding by DRC · 9 years ago
  16. 368cd52 Allow JSIMD_FORCENONE=1 env to disable x86-64 SIMD by DRC · 9 years ago
  17. fbe5007 Merge branch '1.4.x' by DRC · 9 years ago
  18. 71e971f Build: Use FILEPATH type for NASM CMake variable by DRC · 9 years ago
  19. d70a5c1 Remove unnecessary .arch directive in ARM64 code by DRC · 9 years ago
  20. 1e32fe3 Replace INT32 with a new internal datatype (JLONG) by DRC · 9 years ago
  21. 7e3acc0 Rename README, LICENSE, BUILDING text files by DRC · 9 years ago
  22. b961f0b Merge branch '1.4.x' by DRC · 9 years ago
  23. 54792ba Fix MIPS DSPr2 4:2:0 upsample bug w/ small images by James Cowgill · 9 years ago
  24. 498d9bc Fix x86-64 ABI conformance issue in SIMD code by Chandler Carruth · 9 years ago
  25. f62dbcc Fix build error when compiling MIPS SIMD w/ -mfpxx by James Cowgill · 9 years ago
  26. 691cd93 Fix 'make dist' by DRC · 9 years ago
  27. 89b5e06 Studies show that GCC v5.1.0 performs as well as or better than v4.2, but v4.7.x-v4.9.x do not perform as well as v4.2. by DRC · 9 years ago
  28. eea6424 Typo by DRC · 9 years ago
  29. f15ef33 Fix a segfault that occured in the MIPS DSPr2 fancy upsampling routine when downsampled_width==3. Because the DSPr2 code unrolls the loop for the middle columns (refer to jdsample.c), it has the effect of performing two column iterations, and that only works properly if the number of columns (minus the first and last) is >= 2. For the specific case of downsampled_width==3, this patch skips to the second iteration of the unrolled column loop. by DRC · 9 years ago
  30. 3b7015d Enable silent build rules for the NASM objects, if the source is configured with automake 1.11 or later. NOTE: the build still spits out "error: ignoring unknown tag NASM" for each object, but unfortunately, if we remove "--tag NASM" from the command line, the build breaks under older versions of automake (it aborts with "unable to infer tagged configuration.") by DRC · 9 years ago
  31. 771ab19 Extend the AltiVec VMX SIMD routines to support little endian PowerPC platforms. by DRC · 9 years ago
  32. 3f76083 Come on, Cohaagen, you got what you want. Give these people air! by DRC · 9 years ago
  33. 8b5a009 Oops. The MIPS SIMD implementations of h2v1 and h2v2 upsampling were not checking for DSPr2 support, so running 'djpeg -nosmooth' on a non-DSPr2-enabled platform caused an "illegal instruction" error. by DRC · 9 years ago
  34. 246b01b Revert r1506 (we actually are generating columns with the IDCT, so the naming makes sense in retrospect); further de-confusification in the forward DCT by DRC · 10 years ago
  35. c4e3c36 De-confusify the variable names a bit -- "out" represents the output of the IDCT kernel, so use "final" to represent the packed data that will be stored to memory. by DRC · 10 years ago
  36. c641cdd AltiVec SIMD implementation of H2V1 and H2V2 plain upsampling (used only when decompressing YCCK images with fast upsampling enabled.) by DRC · 10 years ago
  37. 86af36a AltiVec SIMD implementation of H2V1 and H2V2 merged upsampling by DRC · 10 years ago
  38. 11c4010 Fix an overread detected by valgrind by DRC · 10 years ago
  39. 2517ef7 Fix bugs in the AltiVec fancy upsampling routines uncovered during additional testing with small image sizes. Since the input width is half the output width, the upsampler should only write a second 16-byte chuck if there are more than 8 input columns left. Additionally, if the width is < 16, then we need to insert a dummy sample (the SSE2 code does this as well, but I neglected to port that portion of the code for some reason.) by DRC · 10 years ago
  40. cbcb536 Fix a bug in the AltiVec downsampling routines uncovered during additional testing with small image sizes. Since the output width is half the input width, the downsampler should only read a second 16-byte chunk if there are more than 8 output columns left. by DRC · 10 years ago
  41. ada430b Make the formatting and naming of variables and constants more consistent by DRC · 10 years ago
  42. 406bb01 Make the formatting and naming of variables and constants more consistent by DRC · 10 years ago
  43. a6a24c2 Make the formatting and naming of variables and constants more consistent by DRC · 10 years ago
  44. 52a4ec6 AltiVec SIMD implementation of H2V1 and H2V2 fancy upsampling by DRC · 10 years ago
  45. 51eba06 Minor code readability tweak by DRC · 10 years ago
  46. d71a6e0 Use intrinsics for loading aligned data in the IDCT functions. This has no effect on performance, but it makes it more obvious what that code is doing. by DRC · 10 years ago
  47. ac4daa7 AltiVec SIMD implementation of YCC-to-RGB color conversion by DRC · 10 years ago
  48. af69295 Fix minor issue in code comments by DRC · 10 years ago
  49. 6aed112 Fix minor issue in code comments by DRC · 10 years ago
  50. a500575 Simplify the code somewhat. It actually wasn't necessary to have a "fast path" and a "medium path"-- they perform the same. by DRC · 10 years ago
  51. 2534788 Overhaul the AltiVec vector loading code in the compression-side colorspace conversion routines. The existing code was sometimes overreading the source buffer (at least according to valgrind), and it was necessary to increase the complexity of the code in order to prevent this without significantly compromising performance. by DRC · 10 years ago
  52. 8de75d0 Fix minor issue in code comments by DRC · 10 years ago
  53. 2204820 AltiVec SIMD implementation of 2x1 and 2x2 downsampling by DRC · 10 years ago
  54. 577ecd9 AltiVec SIMD implementation of sample conversion and integer quantization by DRC · 10 years ago
  55. ff30c63 Document the fact that the AltiVec implementation uses the same modified algorithms as the SSE2 implementation by DRC · 10 years ago
  56. 4545308 Use intrinsics for loading/storing data in the DCT/IDCT functions. This has no effect on the performance of the aligned loads/stores, but it makes it more obvious what that code is doing. Using intrinsics for the unaligned stores in the inverse DCT functions increases overall decompression performance by 1-2%. by DRC · 10 years ago
  57. b1fec4f AltiVec SIMD implementation of RGB-to-Grayscale color conversion by DRC · 10 years ago
  58. 5976e42 Remove unneeded code; Make sure jccolor-altivec.o will be rebuilt if jccolext-altivec.c changes. by DRC · 10 years ago
  59. 62bae20 AltiVec SIMD implementation of RGB-to-YCC color conversion by DRC · 10 years ago
  60. 13af139 Make comments more consistent by DRC · 10 years ago
  61. bf8a5fe Cosmetic tweaks to the PowerPC SIMD stubs by DRC · 10 years ago
  62. 535674b Split AltiVec algorithms into separate files for ease of maintenance; Rename constants using lowercase so they are not confused with macros by DRC · 10 years ago
  63. c9da785 Optimizations to the AltiVec DCT algorithms (pre-compute constants and combine multiply/add operations) by DRC · 10 years ago
  64. 0691162 AltiVec SIMD implementation of slow integer inverse DCT by DRC · 10 years ago
  65. 9cb418d Use macros to allocate constants statically, rather than reading them from a table using vec_splat*(). This improves code readability and probably improves performance a bit as well. by DRC · 10 years ago
  66. 935d1d6 Swap the order of the IFAST and ISLOW FDCT functions so that it matches the order of the prototypes in jsimd.h and the stubs in jsimd_powerpc.c. by DRC · 10 years ago
  67. 86ae591 Include ARMv8 binaries when generating a combined OS X/iOS package using 'make iosdmg' by DRC · 10 years ago
  68. 62999d7 Modify the ARM64 assembly file so that it uses only syntax that the clang assembler in XCode 5.x can understand. These changes should all be cosmetic in nature-- they do not change the meaning or readability of the code nor the ability to build it for Linux. Actually, the code is now more in compliance with the ARM64 programming manual. In addition to these changes, there were a couple of instructions that clang simply doesn't support, so gas-preprocessor.pl was modified so that it now converts those into equivalent instructions that clang can handle. by DRC · 10 years ago
  69. 6cb7f40 AltiVec SIMD implementation of fast integer inverse DCT by DRC · 10 years ago
  70. 040435a Further cleanup of the AltiVec forward DCT code: by DRC · 10 years ago
  71. fb0c394 AltiVec SIMD implementation of slow integer forward DCT; Clean up fast integer forward DCT code so that it is easier to see how it derives from the SSE2 code and to make it play more nicely with the slow FDCT code. by DRC · 10 years ago
  72. e1ac401 Fix cosmetic issues in AltiVec comments by DRC · 10 years ago
  73. 7affbfc The AltiVec code actually works on 32-bit PowerPC platforms as well, so change the "powerpc64" token to "powerpc". Also clean up the shift code, which wasn't building properly on OS X. by DRC · 10 years ago
  74. cd2d8e1 AltiVec SIMD implementation of fast forward DCT by DRC · 10 years ago
  75. 0a9a252 Rename the ARM64 assembly file to match the C file by DRC · 10 years ago
  76. de26249 Fix several mathematical issues discovered in the ARM64 NEON code while running the extended regression tests introduced in r1267. Specific comments can be found in the original patches: by DRC · 10 years ago
  77. a6efae1 Reformat code per Siarhei's original patch (to clearly indicate that the offset instructions are completely independent) and add Siarhei as an individual author (he no longer works for Nokia.) by DRC · 10 years ago
  78. bdc7650 ARM64 NEON SIMD support for YCC-to-RGB565 conversion by DRC · 10 years ago
  79. d729f4d ARM NEON SIMD support for YCC-to-RGB565 conversion, and optimizations to the existing YCC-to-RGB conversion code: by DRC · 10 years ago
  80. 55e328e Revert r1335 and r1336. It was a valiant effort, but on Windows, xmm8-xmm15 are non-volatile, and the overhead of pushing them onto the stack at the beginning of each function and popping them at the end was causing worse performance (in the neighborhood of 3-5%) than just using the work areas and limiting the register usage to xmm0-xmm7. Best to leave the SSE2 code alone. We can optimize the register usage for AVX2, once that port takes place. by DRC · 10 years ago
  81. 2e2ce5a .func/.endfunc are only necessary when generating STABS debug info, which basically went out of style with parachute pants and Rick Astley. At any rate, none of the platforms for which we're building the ARM code use it (DWARF is the common format these days), and the .func/.endfunc directives cause the clang integrated assembler to fail (http://llvm.org/bugs/show_bug.cgi?id=20424). by DRC · 10 years ago
  82. 8a74848 Oops. The Windows version of collect_args/uncollect_args uses rsp, so we still need the rsp prologue/epilogue, despite the fact that we aren't using the stack as a work area. This fixes a segfault on Windows caused by r1335. by DRC · 10 years ago
  83. a8ab342 Attempt to improve performance by refactoring the compression-side color conversion and DCT algorithms so that they take full advantage of the additional registers available with 64-bit SSE2. This produces a somewhat yawn-worthy speedup of 2-3%, but at least the code is a lot more readable now. by DRC · 10 years ago
  84. 3728aa0 Fix performance and other issues uncovered in testing with actual ARM64 hardware; formatting tweaks; remove NEON platform check (NEON is always available with ARMv8) by DRC · 10 years ago
  85. 2472bc7 Add proper support for Borland compilers (Borland needs section names to be prefixed with an underscore, and it needs OMF object files.) by DRC · 10 years ago
  86. 495e434 Allow for building the MIPS DSPr2 extensions if the host is mips-* as well as mipsel-*. The DSPr2 extensions are little endian, so we still have to check that the compiler defines __MIPSEL__ before enabling them. This paves the way for supporting big-endian MIPS, and in the near term, it allows the SIMD extensions to be built with Sourcery CodeBench. by DRC · 10 years ago
  87. 5ef4630 SIMD-accelerated int upsample routine for MIPS DSPr2 by DRC · 10 years ago
  88. c728cfd Fix MIPS build by DRC · 10 years ago
  89. 5033f3e Remove MS-DOS code and information, and adjust copyright headers to reflect the removal of features in r1307 and r1308. libjpeg-turbo has never supported MS-DOS, nor is it even possible for us to do so. by DRC · 10 years ago
  90. bc56b75 Get rid of the HAVE_PROTOTYPES configuration option, as well as the related JMETHOD and JPP macros. libjpeg-turbo has never supported compilers that don't handle prototypes. Doing so requires ansi2knr, which isn't even supported in the IJG code anymore. by DRC · 10 years ago
  91. 52ded87 Remove all of the NEED_SHORT_EXTERNAL_NAMES stuff. There is scant information available as to which linkers ever had a 15-character global symbol name limit. AFAICT, it might have been a VMS and/or a.out BSD thing, but none of those platforms have ever been supported by libjpeg-turbo (nor are such systems supported by other open source libraries of this nature.) by DRC · 10 years ago
  92. 1419852 Clean up code formatting in the SIMD interface functions by DRC · 10 years ago
  93. 1b3fd7e SIMD-accelerated NULL convert routine for MIPS DSPr2 by DRC · 10 years ago
  94. 0bf325b Fix error in MIPS DSPr2 accelerated smooth downsample routine by DRC · 10 years ago
  95. 6a61c1e SIMD-accelerated h2v2 smooth downsampling routine for MIPS DSPr2 by DRC · 10 years ago
  96. b844eaa SIMD-accelerated merged upsampling routines for MIPS DSPr2 by DRC · 10 years ago
  97. e47364a Modify Windows build system to take into account new assembly file names by DRC · 10 years ago
  98. 24e92e9 Using subdirectories unfortunately opened up a can of worms. In order to prevent object name conflicts, it is necessary to use the subdir-objects automake directive, but it simply doesn't work right on some of the versions of automake we still have to support. Another option would be to add a separate Makefile.am file to each subdirectory, but that requires maintaining a completely different set of build rules for each one. Fortunately, however, we're in the 21st century now, so we can use filenames longer than 8.3. by DRC · 10 years ago
  99. 72130be Re-organize the x86/x86-64 SIMD routines into separate folders by instruction set so we can name each routine similarly to its corresponding C file. This also makes it easier to add support for new instruction sets. by DRC · 10 years ago
  100. 1a45b81 Remove trailing spaces (+ one additional tab in TJUnitTest.java that was missed in the previous commit) by DRC · 10 years ago