While implementing unwind information using UnwindAssemblyInstEmulation I ran
into some cleanup I have been wanting to do when reading/writing registers.
Previously all RegisterContext subclasses would need to implement:
virtual bool
ReadRegisterBytes (uint32_t reg, DataExtractor &data);
virtual bool
WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0);
There is now a new class specifically designed to hold register values:
lldb_private::RegisterValue
The new register context calls that subclasses must implement are:
virtual bool
ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value) = 0;
virtual bool
WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value) = 0;
The RegisterValue class must be big enough to handle any register value. The
class contains an enumeration for the value type, and then a union for the
data value. Any integer/float values are stored directly in an appropriate
host integer/float. Anything bigger is stored in a byte buffer that has a length
and byte order. The RegisterValue class also knows how to copy register value
bytes into in a buffer with a specified byte order which can be used to write
the register value down into memory, and this does the right thing when not
all bytes from the register values are needed (getting a uint8 from a uint32
register value..).
All RegiterContext and other sources have been switched over to using the new
regiter value class.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@131096 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
index fb331f2..91f1f1c 100644
--- a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@@ -501,9 +501,7 @@
data = MemARead(context, addr, 4, 0, &success);
if (!success)
return false;
- RegisterInfo reg_info;
- GetRegisterInfo (eRegisterKindDWARF, dwarf_r0 + i, reg_info);
- if (!WriteRegisterUnsigned(context, reg_info, data))
+ if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + i, data))
return false;
addr += addr_byte_size;
}
@@ -802,12 +800,12 @@
break;
case eEncodingA1:
- // d = UInt(Rd); setflags = (S == ‘1’); (imm32, carry) = ARMExpandImm_C(imm12, APSR.C);
+ // d = UInt(Rd); setflags = (S == Ô1Õ); (imm32, carry) = ARMExpandImm_C(imm12, APSR.C);
Rd = Bits32 (opcode, 15, 12);
setflags = BitIsSet (opcode, 20);
imm32 = ARMExpandImm_C (opcode, APSR_C, carry);
- // if Rd == ‘1111’ && S == ‘1’ then SEE SUBS PC, LR and related instructions;
+ // if Rd == Ô1111Õ && S == Ô1Õ then SEE SUBS PC, LR and related instructions;
if ((Rd == 15) && setflags)
return EmulateSUBSPcLrEtc (opcode, encoding);
@@ -1981,7 +1979,7 @@
GetRegisterInfo (eRegisterKindDWARF, start_reg + d + i, dwarf_reg);
context.SetRegisterToRegisterPlusOffset ( dwarf_reg, sp_reg, addr - sp);
// uint64_t to accommodate 64-bit registers.
- uint64_t reg_value = ReadRegisterUnsigned(dwarf_reg, 0, &success);
+ uint64_t reg_value = ReadRegisterUnsigned (&dwarf_reg, 0, &success);
if (!success)
return false;
if (!MemAWrite (context, addr, reg_value, reg_byte_size))
@@ -2077,7 +2075,7 @@
data = MemARead(context, addr, reg_byte_size, 0, &success);
if (!success)
return false;
- if (!WriteRegisterUnsigned(context, dwarf_reg, data))
+ if (!WriteRegisterUnsigned(context, &dwarf_reg, data))
return false;
addr += reg_byte_size;
}
@@ -4232,7 +4230,7 @@
break;
case eEncodingA1:
- // if W == '1' && Rn == '1101’ && BitCount(register_list) >= 2 then SEE PUSH;
+ // if W == '1' && Rn == '1101Õ && BitCount(register_list) >= 2 then SEE PUSH;
if (BitIsSet (opcode, 21) && (Bits32 (opcode, 19, 16) == 13) && BitCount (Bits32 (opcode, 15, 0)) >= 2)
{
// See Push
@@ -9275,7 +9273,7 @@
if ConditionPassed() then
EncodingSpecificOperations();
shifted = Shift(R[m], shift_t, shift_n, APSR.C);
- (result, carry, overflow) = AddWithCarry(SP, NOT(shifted), ‘1’);
+ (result, carry, overflow) = AddWithCarry(SP, NOT(shifted), Ô1Õ);
if d == 15 then // Can only occur for ARM encoding
ALUWritePC(result); // setflags is always FALSE here
else
@@ -9300,7 +9298,7 @@
switch (encoding)
{
case eEncodingT1:
- // d = UInt(Rd); m = UInt(Rm); setflags = (S == ‘1’);
+ // d = UInt(Rd); m = UInt(Rm); setflags = (S == Ô1Õ);
d = Bits32 (opcode, 11, 8);
m = Bits32 (opcode, 3, 0);
setflags = BitIsSet (opcode, 20);
@@ -9318,12 +9316,12 @@
break;
case eEncodingA1:
- // d = UInt(Rd); m = UInt(Rm); setflags = (S == ‘1’);
+ // d = UInt(Rd); m = UInt(Rm); setflags = (S == Ô1Õ);
d = Bits32 (opcode, 15, 12);
m = Bits32 (opcode, 3, 0);
setflags = BitIsSet (opcode, 20);
- // if Rd == ‘1111’ && S == ‘1’ then SEE SUBS PC, LR and related instructions;
+ // if Rd == Ô1111Õ && S == Ô1Õ then SEE SUBS PC, LR and related instructions;
if (d == 15 && setflags)
EmulateSUBSPcLrEtc (opcode, encoding);
@@ -9342,7 +9340,7 @@
uint32_t shifted = Shift (Rm, shift_t, shift_n, APSR_C);
- // (result, carry, overflow) = AddWithCarry(SP, NOT(shifted), ‘1’);
+ // (result, carry, overflow) = AddWithCarry(SP, NOT(shifted), Ô1Õ);
uint32_t sp_val = ReadCoreReg (SP_REG, &success);
if (!success)
return false;
@@ -9373,7 +9371,7 @@
EncodingSpecificOperations();
shift_n = UInt(R[s]<7:0>);
shifted = Shift(R[m], shift_t, shift_n, APSR.C);
- (result, carry, overflow) = AddWithCarry(R[n], shifted, ‘0’);
+ (result, carry, overflow) = AddWithCarry(R[n], shifted, Ô0Õ);
R[d] = result;
if setflags then
APSR.N = result<31>;
@@ -9402,7 +9400,7 @@
m = Bits32 (opcode, 3, 0);
s = Bits32 (opcode, 11, 8);
- // setflags = (S == ‘1’); shift_t = DecodeRegShift(type);
+ // setflags = (S == Ô1Õ); shift_t = DecodeRegShift(type);
setflags = BitIsSet (opcode, 20);
shift_t = DecodeRegShift (Bits32 (opcode, 6, 5));
@@ -9429,7 +9427,7 @@
uint32_t shifted = Shift (Rm, shift_t, shift_n, APSR_C);
- // (result, carry, overflow) = AddWithCarry(R[n], shifted, ‘0’);
+ // (result, carry, overflow) = AddWithCarry(R[n], shifted, Ô0Õ);
uint32_t Rn = ReadCoreReg (n, &success);
if (!success)
return false;
@@ -9468,7 +9466,7 @@
if ConditionPassed() then
EncodingSpecificOperations();
shifted = Shift(R[m], shift_t, shift_n, APSR.C);
- (result, carry, overflow) = AddWithCarry(R[n], NOT(shifted), ‘1’);
+ (result, carry, overflow) = AddWithCarry(R[n], NOT(shifted), Ô1Õ);
if d == 15 then // Can only occur for ARM encoding
ALUWritePC(result); // setflags is always FALSE here
else
@@ -9507,9 +9505,9 @@
break;
case eEncodingT2:
- // if Rd == ‘1111’ && S == ‘1’ then SEE CMP (register);
- // if Rn == ‘1101’ then SEE SUB (SP minus register);
- // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == ‘1’);
+ // if Rd == Ô1111Õ && S == Ô1Õ then SEE CMP (register);
+ // if Rn == Ô1101Õ then SEE SUB (SP minus register);
+ // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == Ô1Õ);
d = Bits32 (opcode, 11, 8);
n = Bits32 (opcode, 19, 16);
m = Bits32 (opcode, 3, 0);
@@ -9525,14 +9523,14 @@
break;
case eEncodingA1:
- // if Rn == ‘1101’ then SEE SUB (SP minus register);
- // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == ‘1’);
+ // if Rn == Ô1101Õ then SEE SUB (SP minus register);
+ // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == Ô1Õ);
d = Bits32 (opcode, 15, 12);
n = Bits32 (opcode, 19, 16);
m = Bits32 (opcode, 3, 0);
setflags = BitIsSet (opcode, 20);
- // if Rd == ‘1111’ && S == ‘1’ then SEE SUBS PC, LR and related instructions;
+ // if Rd == Ô1111Õ && S == Ô1Õ then SEE SUBS PC, LR and related instructions;
if ((d == 15) && setflags)
EmulateSUBSPcLrEtc (opcode, encoding);
@@ -9552,7 +9550,7 @@
uint32_t shifted = Shift (Rm, shift_t, shift_n, APSR_C);
- // (result, carry, overflow) = AddWithCarry(R[n], NOT(shifted), ‘1’);
+ // (result, carry, overflow) = AddWithCarry(R[n], NOT(shifted), Ô1Õ);
uint32_t Rn = ReadCoreReg (n, &success);
if (!success)
return false;
@@ -9613,7 +9611,7 @@
switch (encoding)
{
case eEncodingT1:
- // d = UInt(Rd); t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm8:’00’, 32);
+ // d = UInt(Rd); t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
d = Bits32 (opcode, 11, 8);
t = Bits32 (opcode, 15, 12);
n = Bits32 (opcode, 19, 16);
@@ -9719,13 +9717,13 @@
switch (encoding)
{
case eEncodingA1:
- // if P == ‘0’ && W == ‘1’ then SEE STRBT;
+ // if P == Ô0Õ && W == Ô1Õ then SEE STRBT;
// t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
t = Bits32 (opcode, 15, 12);
n = Bits32 (opcode, 19, 16);
imm32 = Bits32 (opcode, 11, 0);
- // index = (P == ‘1’); add = (U == ‘1’); wback = (P == ‘0’) || (W == ‘1’);
+ // index = (P == Ô1Õ); add = (U == Ô1Õ); wback = (P == Ô0Õ) || (W == Ô1Õ);
index = BitIsSet (opcode, 24);
add = BitIsSet (opcode, 23);
wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
@@ -9817,14 +9815,14 @@
switch (encoding)
{
case eEncodingA1:
- // if P == ‘0’ && W == ‘1’ then SEE STRT;
- // if Rn == ‘1101’ && P == ‘1’ && U == ‘0’ && W == ‘1’ && imm12 == ‘000000000100’ then SEE PUSH;
+ // if P == Ô0Õ && W == Ô1Õ then SEE STRT;
+ // if Rn == Ô1101Õ && P == Ô1Õ && U == Ô0Õ && W == Ô1Õ && imm12 == Ô000000000100Õ then SEE PUSH;
// t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
t = Bits32 (opcode, 15, 12);
n = Bits32 (opcode, 19, 16);
imm32 = Bits32 (opcode, 11, 0);
- // index = (P == ‘1’); add = (U == ‘1’); wback = (P == ‘0’) || (W == ‘1’);
+ // index = (P == Ô1Õ); add = (U == Ô1Õ); wback = (P == Ô0Õ) || (W == Ô1Õ);
index = BitIsSet (opcode, 24);
add = BitIsSet (opcode, 23);
wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
@@ -9929,15 +9927,15 @@
switch (encoding)
{
case eEncodingT1:
- //if P == ‘0’ && W == ‘0’ then SEE “Related encodings”;
- //if Rn == ‘1111’ then SEE LDRD (literal);
- //t = UInt(Rt); t2 = UInt(Rt2); n = UInt(Rn); imm32 = ZeroExtend(imm8:’00’, 32);
+ //if P == Ô0Õ && W == Ô0Õ then SEE ÒRelated encodingsÓ;
+ //if Rn == Ô1111Õ then SEE LDRD (literal);
+ //t = UInt(Rt); t2 = UInt(Rt2); n = UInt(Rn); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
t = Bits32 (opcode, 15, 12);
t2 = Bits32 (opcode, 11, 8);
n = Bits32 (opcode, 19, 16);
imm32 = Bits32 (opcode, 7, 0) << 2;
- //index = (P == ‘1’); add = (U == ‘1’); wback = (W == ‘1’);
+ //index = (P == Ô1Õ); add = (U == Ô1Õ); wback = (W == Ô1Õ);
index = BitIsSet (opcode, 24);
add = BitIsSet (opcode, 23);
wback = BitIsSet (opcode, 21);
@@ -9953,8 +9951,8 @@
break;
case eEncodingA1:
- //if Rn == ‘1111’ then SEE LDRD (literal);
- //if Rt<0> == ‘1’ then UNPREDICTABLE;
+ //if Rn == Ô1111Õ then SEE LDRD (literal);
+ //if Rt<0> == Ô1Õ then UNPREDICTABLE;
//t = UInt(Rt); t2 = t+1; n = UInt(Rn); imm32 = ZeroExtend(imm4H:imm4L, 32);
t = Bits32 (opcode, 15, 12);
if (BitIsSet (t, 0))
@@ -9963,12 +9961,12 @@
n = Bits32 (opcode, 19, 16);
imm32 = (Bits32 (opcode, 11, 8) << 4) | Bits32 (opcode, 3, 0);
- //index = (P == ‘1’); add = (U == ‘1’); wback = (P == ‘0’) || (W == ‘1’);
+ //index = (P == Ô1Õ); add = (U == Ô1Õ); wback = (P == Ô0Õ) || (W == Ô1Õ);
index = BitIsSet (opcode, 24);
add = BitIsSet (opcode, 23);
wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
- //if P == ‘0’ && W == ‘1’ then UNPREDICTABLE;
+ //if P == Ô0Õ && W == Ô1Õ then UNPREDICTABLE;
if (BitIsClear (opcode, 24) && BitIsSet (opcode, 21))
return false;
@@ -10074,7 +10072,7 @@
switch (encoding)
{
case eEncodingA1:
- // if Rt<0> == ‘1’ then UNPREDICTABLE;
+ // if Rt<0> == Ô1Õ then UNPREDICTABLE;
// t = UInt(Rt); t2 = t+1; n = UInt(Rn); m = UInt(Rm);
t = Bits32 (opcode, 15, 12);
if (BitIsSet (t, 0))
@@ -10083,12 +10081,12 @@
n = Bits32 (opcode, 19, 16);
m = Bits32 (opcode, 3, 0);
- // index = (P == ‘1’); add = (U == ‘1’); wback = (P == ‘0’) || (W == ‘1’);
+ // index = (P == Ô1Õ); add = (U == Ô1Õ); wback = (P == Ô0Õ) || (W == Ô1Õ);
index = BitIsSet (opcode, 24);
add = BitIsSet (opcode, 23);
wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
- // if P == ‘0’ && W == ‘1’ then UNPREDICTABLE;
+ // if P == Ô0Õ && W == Ô1Õ then UNPREDICTABLE;
if (BitIsClear (opcode, 24) && BitIsSet (opcode, 21))
return false;
@@ -10201,14 +10199,14 @@
switch (encoding)
{
case eEncodingT1:
- // if P == ‘0’ && W == ‘0’ then SEE “Related encodings”;
- // t = UInt(Rt); t2 = UInt(Rt2); n = UInt(Rn); imm32 = ZeroExtend(imm8:’00’, 32);
+ // if P == Ô0Õ && W == Ô0Õ then SEE ÒRelated encodingsÓ;
+ // t = UInt(Rt); t2 = UInt(Rt2); n = UInt(Rn); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
t = Bits32 (opcode, 15, 12);
t2 = Bits32 (opcode, 11, 8);
n = Bits32 (opcode, 19, 16);
imm32 = Bits32 (opcode, 7, 0) << 2;
- // index = (P == ‘1’); add = (U == ‘1’); wback = (W == ‘1’);
+ // index = (P == Ô1Õ); add = (U == Ô1Õ); wback = (W == Ô1Õ);
index = BitIsSet (opcode, 24);
add = BitIsSet (opcode, 23);
wback = BitIsSet (opcode, 21);
@@ -10224,7 +10222,7 @@
break;
case eEncodingA1:
- // if Rt<0> == ‘1’ then UNPREDICTABLE;
+ // if Rt<0> == Ô1Õ then UNPREDICTABLE;
// t = UInt(Rt); t2 = t+1; n = UInt(Rn); imm32 = ZeroExtend(imm4H:imm4L, 32);
t = Bits32 (opcode, 15, 12);
if (BitIsSet (t, 0))
@@ -10234,12 +10232,12 @@
n = Bits32 (opcode, 19, 16);
imm32 = (Bits32 (opcode, 11, 8) << 4) | Bits32 (opcode, 3, 0);
- // index = (P == ‘1’); add = (U == ‘1’); wback = (P == ‘0’) || (W == ‘1’);
+ // index = (P == Ô1Õ); add = (U == Ô1Õ); wback = (P == Ô0Õ) || (W == Ô1Õ);
index = BitIsSet (opcode, 24);
add = BitIsSet (opcode, 23);
wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
- // if P == ‘0’ && W == ‘1’ then UNPREDICTABLE;
+ // if P == Ô0Õ && W == Ô1Õ then UNPREDICTABLE;
if (BitIsClear (opcode, 24) && BitIsSet (opcode, 21))
return false;
@@ -10349,7 +10347,7 @@
switch (encoding)
{
case eEncodingA1:
- // if Rt<0> == ‘1’ then UNPREDICTABLE;
+ // if Rt<0> == Ô1Õ then UNPREDICTABLE;
// t = UInt(Rt); t2 = t+1; n = UInt(Rn); m = UInt(Rm);
t = Bits32 (opcode, 15, 12);
if (BitIsSet (t, 0))
@@ -10359,12 +10357,12 @@
n = Bits32 (opcode, 19, 16);
m = Bits32 (opcode, 3, 0);
- // index = (P == ‘1’); add = (U == ‘1’); wback = (P == ‘0’) || (W == ‘1’);
+ // index = (P == Ô1Õ); add = (U == Ô1Õ); wback = (P == Ô0Õ) || (W == Ô1Õ);
index = BitIsSet (opcode, 24);
add = BitIsSet (opcode, 23);
wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
- // if P == ‘0’ && W == ‘1’ then UNPREDICTABLE;
+ // if P == Ô0Õ && W == Ô1Õ then UNPREDICTABLE;
if (BitIsClear (opcode, 24) && BitIsSet (opcode, 21))
return false;
@@ -10490,25 +10488,25 @@
{
case eEncodingT1:
case eEncodingA1:
- // if P == ‘0’ && U == ‘0’ && W == ‘0’ then SEE “Related encodings”;
- // if P == ‘0’ && U == ‘1’ && W == ‘1’ && Rn == ‘1101’ then SEE VPOP;
- // if P == ‘1’ && W == ‘0’ then SEE VLDR;
- // if P == U && W == ‘1’ then UNDEFINED;
+ // if P == Ô0Õ && U == Ô0Õ && W == Ô0Õ then SEE ÒRelated encodingsÓ;
+ // if P == Ô0Õ && U == Ô1Õ && W == Ô1Õ && Rn == Ô1101Õ then SEE VPOP;
+ // if P == Ô1Õ && W == Ô0Õ then SEE VLDR;
+ // if P == U && W == Ô1Õ then UNDEFINED;
if ((Bit32 (opcode, 24) == Bit32 (opcode, 23)) && BitIsSet (opcode, 21))
return false;
// // Remaining combinations are PUW = 010 (IA without !), 011 (IA with !), 101 (DB with !)
- // single_regs = FALSE; add = (U == ‘1’); wback = (W == ‘1’);
+ // single_regs = FALSE; add = (U == Ô1Õ); wback = (W == Ô1Õ);
single_regs = false;
add = BitIsSet (opcode, 23);
wback = BitIsSet (opcode, 21);
- // d = UInt(D:Vd); n = UInt(Rn); imm32 = ZeroExtend(imm8:’00’, 32);
+ // d = UInt(D:Vd); n = UInt(Rn); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
d = (Bit32 (opcode, 22) << 4) | Bits32 (opcode, 15, 12);
n = Bits32 (opcode, 19, 16);
imm32 = Bits32 (opcode, 7, 0) << 2;
- // regs = UInt(imm8) DIV 2; // If UInt(imm8) is odd, see “FLDMX”.
+ // regs = UInt(imm8) DIV 2; // If UInt(imm8) is odd, see ÒFLDMXÓ.
regs = Bits32 (opcode, 7, 0) / 2;
// if n == 15 && (wback || CurrentInstrSet() != InstrSet_ARM) then UNPREDICTABLE;
@@ -10523,22 +10521,22 @@
case eEncodingT2:
case eEncodingA2:
- // if P == ‘0’ && U == ‘0’ && W == ‘0’ then SEE “Related encodings”;
- // if P == ‘0’ && U == ‘1’ && W == ‘1’ && Rn == ‘1101’ then SEE VPOP;
- // if P == ‘1’ && W == ‘0’ then SEE VLDR;
- // if P == U && W == ‘1’ then UNDEFINED;
+ // if P == Ô0Õ && U == Ô0Õ && W == Ô0Õ then SEE ÒRelated encodingsÓ;
+ // if P == Ô0Õ && U == Ô1Õ && W == Ô1Õ && Rn == Ô1101Õ then SEE VPOP;
+ // if P == Ô1Õ && W == Ô0Õ then SEE VLDR;
+ // if P == U && W == Ô1Õ then UNDEFINED;
if ((Bit32 (opcode, 24) == Bit32 (opcode, 23)) && BitIsSet (opcode, 21))
return false;
// // Remaining combinations are PUW = 010 (IA without !), 011 (IA with !), 101 (DB with !)
- // single_regs = TRUE; add = (U == ‘1’); wback = (W == ‘1’); d = UInt(Vd:D); n = UInt(Rn);
+ // single_regs = TRUE; add = (U == Ô1Õ); wback = (W == Ô1Õ); d = UInt(Vd:D); n = UInt(Rn);
single_regs = true;
add = BitIsSet (opcode, 23);
wback = BitIsSet (opcode, 21);
d = (Bits32 (opcode, 15, 12) << 1) | Bit32 (opcode, 22);
n = Bits32 (opcode, 19, 16);
- // imm32 = ZeroExtend(imm8:’00’, 32); regs = UInt(imm8);
+ // imm32 = ZeroExtend(imm8:Õ00Õ, 32); regs = UInt(imm8);
imm32 = Bits32 (opcode, 7, 0) << 2;
regs = Bits32 (opcode, 7, 0);
@@ -10682,25 +10680,25 @@
{
case eEncodingT1:
case eEncodingA1:
- // if P == ‘0’ && U == ‘0’ && W == ‘0’ then SEE “Related encodings”;
- // if P == ‘1’ && U == ‘0’ && W == ‘1’ && Rn == ‘1101’ then SEE VPUSH;
- // if P == ‘1’ && W == ‘0’ then SEE VSTR;
- // if P == U && W == ‘1’ then UNDEFINED;
+ // if P == Ô0Õ && U == Ô0Õ && W == Ô0Õ then SEE ÒRelated encodingsÓ;
+ // if P == Ô1Õ && U == Ô0Õ && W == Ô1Õ && Rn == Ô1101Õ then SEE VPUSH;
+ // if P == Ô1Õ && W == Ô0Õ then SEE VSTR;
+ // if P == U && W == Ô1Õ then UNDEFINED;
if ((Bit32 (opcode, 24) == Bit32 (opcode, 23)) && BitIsSet (opcode, 21))
return false;
// // Remaining combinations are PUW = 010 (IA without !), 011 (IA with !), 101 (DB with !)
- // single_regs = FALSE; add = (U == ‘1’); wback = (W == ‘1’);
+ // single_regs = FALSE; add = (U == Ô1Õ); wback = (W == Ô1Õ);
single_regs = false;
add = BitIsSet (opcode, 23);
wback = BitIsSet (opcode, 21);
- // d = UInt(D:Vd); n = UInt(Rn); imm32 = ZeroExtend(imm8:’00’, 32);
+ // d = UInt(D:Vd); n = UInt(Rn); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
d = (Bit32 (opcode, 22) << 4) | Bits32 (opcode, 15, 12);
n = Bits32 (opcode, 19, 16);
imm32 = Bits32 (opcode, 7, 0) << 2;
- // regs = UInt(imm8) DIV 2; // If UInt(imm8) is odd, see “FSTMX”.
+ // regs = UInt(imm8) DIV 2; // If UInt(imm8) is odd, see ÒFSTMXÓ.
regs = Bits32 (opcode, 7, 0) / 2;
// if n == 15 && (wback || CurrentInstrSet() != InstrSet_ARM) then UNPREDICTABLE;
@@ -10715,22 +10713,22 @@
case eEncodingT2:
case eEncodingA2:
- // if P == ‘0’ && U == ‘0’ && W == ‘0’ then SEE “Related encodings”;
- // if P == ‘1’ && U == ‘0’ && W == ‘1’ && Rn == ‘1101’ then SEE VPUSH;
- // if P == ‘1’ && W == ‘0’ then SEE VSTR;
- // if P == U && W == ‘1’ then UNDEFINED;
+ // if P == Ô0Õ && U == Ô0Õ && W == Ô0Õ then SEE ÒRelated encodingsÓ;
+ // if P == Ô1Õ && U == Ô0Õ && W == Ô1Õ && Rn == Ô1101Õ then SEE VPUSH;
+ // if P == Ô1Õ && W == Ô0Õ then SEE VSTR;
+ // if P == U && W == Ô1Õ then UNDEFINED;
if ((Bit32 (opcode, 24) == Bit32 (opcode, 23)) && BitIsSet (opcode, 21))
return false;
// // Remaining combinations are PUW = 010 (IA without !), 011 (IA with !), 101 (DB with !)
- // single_regs = TRUE; add = (U == ‘1’); wback = (W == ‘1’); d = UInt(Vd:D); n = UInt(Rn);
+ // single_regs = TRUE; add = (U == Ô1Õ); wback = (W == Ô1Õ); d = UInt(Vd:D); n = UInt(Rn);
single_regs = true;
add = BitIsSet (opcode, 23);
wback = BitIsSet (opcode, 21);
d = (Bits32 (opcode, 15, 12) << 1) | Bit32 (opcode, 22);
n = Bits32 (opcode, 19, 16);
- // imm32 = ZeroExtend(imm8:’00’, 32); regs = UInt(imm8);
+ // imm32 = ZeroExtend(imm8:Õ00Õ, 32); regs = UInt(imm8);
imm32 = Bits32 (opcode, 7, 0) << 2;
regs = Bits32 (opcode, 7, 0);
@@ -10875,7 +10873,7 @@
{
case eEncodingT1:
case eEncodingA1:
- // single_reg = FALSE; add = (U == ‘1’); imm32 = ZeroExtend(imm8:’00’, 32);
+ // single_reg = FALSE; add = (U == Ô1Õ); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
single_reg = false;
add = BitIsSet (opcode, 23);
imm32 = Bits32 (opcode, 7, 0) << 2;
@@ -10888,7 +10886,7 @@
case eEncodingT2:
case eEncodingA2:
- // single_reg = TRUE; add = (U == ‘1’); imm32 = ZeroExtend(imm8:’00’, 32);
+ // single_reg = TRUE; add = (U == Ô1Õ); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
single_reg = true;
add = BitIsSet (opcode, 23);
imm32 = Bits32 (opcode, 7, 0) << 2;
@@ -11004,7 +11002,7 @@
{
case eEncodingT1:
case eEncodingA1:
- // single_reg = FALSE; add = (U == ‘1’); imm32 = ZeroExtend(imm8:’00’, 32);
+ // single_reg = FALSE; add = (U == Ô1Õ); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
single_reg = false;
add = BitIsSet (opcode, 23);
imm32 = Bits32 (opcode, 7, 0) << 2;
@@ -11021,7 +11019,7 @@
case eEncodingT2:
case eEncodingA2:
- // single_reg = TRUE; add = (U == ‘1’); imm32 = ZeroExtend(imm8:’00’, 32);
+ // single_reg = TRUE; add = (U == Ô1Õ); imm32 = ZeroExtend(imm8:Õ00Õ, 32);
single_reg = true;
add = BitIsSet (opcode, 23);
imm32 = Bits32 (opcode, 7, 0) << 2;
@@ -11143,16 +11141,16 @@
case eEncodingA1:
{
// case type of
- // when ‘0111’
- // regs = 1; if align<1> == ‘1’ then UNDEFINED;
- // when ‘1010’
- // regs = 2; if align == ‘11’ then UNDEFINED;
- // when ‘0110’
- // regs = 3; if align<1> == ‘1’ then UNDEFINED;
- // when ‘0010’
+ // when Ô0111Õ
+ // regs = 1; if align<1> == Ô1Õ then UNDEFINED;
+ // when Ô1010Õ
+ // regs = 2; if align == Ô11Õ then UNDEFINED;
+ // when Ô0110Õ
+ // regs = 3; if align<1> == Ô1Õ then UNDEFINED;
+ // when Ô0010Õ
// regs = 4;
// otherwise
- // SEE “Related encodings”;
+ // SEE ÒRelated encodingsÓ;
uint32_t type = Bits32 (opcode, 11, 8);
uint32_t align = Bits32 (opcode, 5, 4);
if (type == 7) // '0111'
@@ -11181,7 +11179,7 @@
else
return false;
- // alignment = if align == ‘00’ then 1 else 4 << UInt(align);
+ // alignment = if align == Ô00Õ then 1 else 4 << UInt(align);
if (align == 0)
alignment = 1;
else
@@ -11306,13 +11304,13 @@
{
uint32_t size = Bits32 (opcode, 11, 10);
uint32_t index_align = Bits32 (opcode, 7, 4);
- // if size == ‘11’ then SEE VLD1 (single element to all lanes);
+ // if size == Ô11Õ then SEE VLD1 (single element to all lanes);
if (size == 3)
return EmulateVLD1SingleAll (opcode, encoding);
// case size of
if (size == 0) // when '00'
{
- // if index_align<0> != ‘0’ then UNDEFINED;
+ // if index_align<0> != Ô0Õ then UNDEFINED;
if (BitIsClear (index_align, 0))
return false;
@@ -11322,9 +11320,9 @@
index = Bits32 (index_align, 3, 1);
alignment = 1;
}
- else if (size == 1) // when ‘01’
+ else if (size == 1) // when Ô01Õ
{
- // if index_align<1> != ‘0’ then UNDEFINED;
+ // if index_align<1> != Ô0Õ then UNDEFINED;
if (BitIsClear (index_align, 1))
return false;
@@ -11333,19 +11331,19 @@
esize = 16;
index = Bits32 (index_align, 3, 2);
- // alignment = if index_align<0> == ‘0’ then 1 else 2;
+ // alignment = if index_align<0> == Ô0Õ then 1 else 2;
if (BitIsClear (index_align, 0))
alignment = 1;
else
alignment = 2;
}
- else if (size == 2) // when ‘10’
+ else if (size == 2) // when Ô10Õ
{
- // if index_align<2> != ‘0’ then UNDEFINED;
+ // if index_align<2> != Ô0Õ then UNDEFINED;
if (BitIsClear (index_align, 2))
return false;
- // if index_align<1:0> != ‘00’ && index_align<1:0> != ‘11’ then UNDEFINED;
+ // if index_align<1:0> != Ô00Õ && index_align<1:0> != Ô11Õ then UNDEFINED;
if ((Bits32 (index_align, 1, 0) != 0) && (Bits32 (index_align, 1, 0) != 3))
return false;
@@ -11354,7 +11352,7 @@
esize = 32;
index = Bit32 (index_align, 3);
- // alignment = if index_align<1:0> == ‘00’ then 1 else 4;
+ // alignment = if index_align<1:0> == Ô00Õ then 1 else 4;
if (Bits32 (index_align, 1, 0) == 0)
alignment = 1;
else
@@ -11484,35 +11482,35 @@
uint32_t align = Bits32 (opcode, 5, 4);
// case type of
- if (type == 7) // when ‘0111’
+ if (type == 7) // when Ô0111Õ
{
- // regs = 1; if align<1> == ‘1’ then UNDEFINED;
+ // regs = 1; if align<1> == Ô1Õ then UNDEFINED;
regs = 1;
if (BitIsSet (align, 1))
return false;
}
- else if (type == 10) // when ‘1010’
+ else if (type == 10) // when Ô1010Õ
{
- // regs = 2; if align == ‘11’ then UNDEFINED;
+ // regs = 2; if align == Ô11Õ then UNDEFINED;
regs = 2;
if (align == 3)
return false;
}
- else if (type == 6) // when ‘0110’
+ else if (type == 6) // when Ô0110Õ
{
- // regs = 3; if align<1> == ‘1’ then UNDEFINED;
+ // regs = 3; if align<1> == Ô1Õ then UNDEFINED;
regs = 3;
if (BitIsSet (align, 1))
return false;
}
- else if (type == 2) // when ‘0010’
+ else if (type == 2) // when Ô0010Õ
// regs = 4;
regs = 4;
else // otherwise
- // SEE “Related encodings”;
+ // SEE ÒRelated encodingsÓ;
return false;
- // alignment = if align == ‘00’ then 1 else 4 << UInt(align);
+ // alignment = if align == Ô00Õ then 1 else 4 << UInt(align);
if (align == 0)
alignment = 0;
else
@@ -11642,14 +11640,14 @@
uint32_t size = Bits32 (opcode, 11, 10);
uint32_t index_align = Bits32 (opcode, 7, 4);
- // if size == ‘11’ then UNDEFINED;
+ // if size == Ô11Õ then UNDEFINED;
if (size == 3)
return false;
// case size of
- if (size == 0) // when ‘00’
+ if (size == 0) // when Ô00Õ
{
- // if index_align<0> != ‘0’ then UNDEFINED;
+ // if index_align<0> != Ô0Õ then UNDEFINED;
if (BitIsClear (index_align, 0))
return false;
// ebytes = 1; esize = 8; index = UInt(index_align<3:1>); alignment = 1;
@@ -11658,9 +11656,9 @@
index = Bits32 (index_align, 3, 1);
alignment = 1;
}
- else if (size == 1) // when ‘01’
+ else if (size == 1) // when Ô01Õ
{
- // if index_align<1> != ‘0’ then UNDEFINED;
+ // if index_align<1> != Ô0Õ then UNDEFINED;
if (BitIsClear (index_align, 1))
return false;
@@ -11669,19 +11667,19 @@
esize = 16;
index = Bits32 (index_align, 3, 2);
- // alignment = if index_align<0> == ‘0’ then 1 else 2;
+ // alignment = if index_align<0> == Ô0Õ then 1 else 2;
if (BitIsClear (index_align, 0))
alignment = 1;
else
alignment = 2;
}
- else if (size == 2) // when ‘10’
+ else if (size == 2) // when Ô10Õ
{
- // if index_align<2> != ‘0’ then UNDEFINED;
+ // if index_align<2> != Ô0Õ then UNDEFINED;
if (BitIsClear (index_align, 2))
return false;
- // if index_align<1:0> != ‘00’ && index_align<1:0> != ‘11’ then UNDEFINED;
+ // if index_align<1:0> != Ô00Õ && index_align<1:0> != Ô11Õ then UNDEFINED;
if ((Bits32 (index_align, 1, 0) != 0) && (Bits32 (index_align, 1, 0) != 3))
return false;
@@ -11690,7 +11688,7 @@
esize = 32;
index = Bit32 (index_align, 3);
- // alignment = if index_align<1:0> == ‘00’ then 1 else 4;
+ // alignment = if index_align<1:0> == Ô00Õ then 1 else 4;
if (Bits32 (index_align, 1, 0) == 0)
alignment = 1;
else
@@ -11799,12 +11797,12 @@
case eEncodingT1:
case eEncodingA1:
{
- //if size == ‘11’ || (size == ‘00’ && a == ‘1’) then UNDEFINED;
+ //if size == Ô11Õ || (size == Ô00Õ && a == Ô1Õ) then UNDEFINED;
uint32_t size = Bits32 (opcode, 7, 6);
if ((size == 3) || ((size == 0) && BitIsSet (opcode, 4)))
return false;
- //ebytes = 1 << UInt(size); elements = 8 DIV ebytes; regs = if T == ‘0’ then 1 else 2;
+ //ebytes = 1 << UInt(size); elements = 8 DIV ebytes; regs = if T == Ô0Õ then 1 else 2;
ebytes = 1 << size;
elements = 8 / ebytes;
if (BitIsClear (opcode, 5))
@@ -11812,7 +11810,7 @@
else
regs = 2;
- //alignment = if a == ‘0’ then 1 else ebytes;
+ //alignment = if a == Ô0Õ then 1 else ebytes;
if (BitIsClear (opcode, 4))
alignment = 1;
else
@@ -11909,19 +11907,19 @@
UNPREDICTABLE;
operand2 = if register_form then Shift(R[m], shift_t, shift_n, APSR.C) else imm32;
case opcode of
- when ‘0000’ result = R[n] AND operand2; // AND
- when ‘0001’ result = R[n] EOR operand2; // EOR
- when ‘0010’ (result, -, -) = AddWithCarry(R[n], NOT(operand2), ‘1’); // SUB
- when ‘0011’ (result, -, -) = AddWithCarry(NOT(R[n]), operand2, ‘1’); // RSB
- when ‘0100’ (result, -, -) = AddWithCarry(R[n], operand2, ‘0’); // ADD
- when ‘0101’ (result, -, -) = AddWithCarry(R[n], operand2, APSR.c); // ADC
- when ‘0110’ (result, -, -) = AddWithCarry(R[n], NOT(operand2), APSR.C); // SBC
- when ‘0111’ (result, -, -) = AddWithCarry(NOT(R[n]), operand2, APSR.C); // RSC
- when ‘1100’ result = R[n] OR operand2; // ORR
- when ‘1101’ result = operand2; // MOV
- when ‘1110’ result = R[n] AND NOT(operand2); // BIC
- when ‘1111’ result = NOT(operand2); // MVN
- CPSRWriteByInstr(SPSR[], ‘1111’, TRUE);
+ when Ô0000Õ result = R[n] AND operand2; // AND
+ when Ô0001Õ result = R[n] EOR operand2; // EOR
+ when Ô0010Õ (result, -, -) = AddWithCarry(R[n], NOT(operand2), Ô1Õ); // SUB
+ when Ô0011Õ (result, -, -) = AddWithCarry(NOT(R[n]), operand2, Ô1Õ); // RSB
+ when Ô0100Õ (result, -, -) = AddWithCarry(R[n], operand2, Ô0Õ); // ADD
+ when Ô0101Õ (result, -, -) = AddWithCarry(R[n], operand2, APSR.c); // ADC
+ when Ô0110Õ (result, -, -) = AddWithCarry(R[n], NOT(operand2), APSR.C); // SBC
+ when Ô0111Õ (result, -, -) = AddWithCarry(NOT(R[n]), operand2, APSR.C); // RSC
+ when Ô1100Õ result = R[n] OR operand2; // ORR
+ when Ô1101Õ result = operand2; // MOV
+ when Ô1110Õ result = R[n] AND NOT(operand2); // BIC
+ when Ô1111Õ result = NOT(operand2); // MVN
+ CPSRWriteByInstr(SPSR[], Ô1111Õ, TRUE);
BranchWritePC(result);
#endif
@@ -11941,7 +11939,7 @@
{
case eEncodingT1:
// if CurrentInstrSet() == InstrSet_ThumbEE then UNPREDICTABLE
- // n = 14; imm32 = ZeroExtend(imm8, 32); register_form = FALSE; opcode = ‘0010’; // = SUB
+ // n = 14; imm32 = ZeroExtend(imm8, 32); register_form = FALSE; opcode = Ô0010Õ; // = SUB
n = 14;
imm32 = Bits32 (opcode, 7, 0);
register_form = false;
@@ -12002,62 +12000,62 @@
// case opcode of
switch (code)
{
- case 0: // when ‘0000’
+ case 0: // when Ô0000Õ
// result = R[n] AND operand2; // AND
result.result = Rn & operand2;
break;
- case 1: // when ‘0001’
+ case 1: // when Ô0001Õ
// result = R[n] EOR operand2; // EOR
result.result = Rn ^ operand2;
break;
- case 2: // when ‘0010’
- // (result, -, -) = AddWithCarry(R[n], NOT(operand2), ‘1’); // SUB
+ case 2: // when Ô0010Õ
+ // (result, -, -) = AddWithCarry(R[n], NOT(operand2), Ô1Õ); // SUB
result = AddWithCarry (Rn, ~(operand2), 1);
break;
- case 3: // when ‘0011’
- // (result, -, -) = AddWithCarry(NOT(R[n]), operand2, ‘1’); // RSB
+ case 3: // when Ô0011Õ
+ // (result, -, -) = AddWithCarry(NOT(R[n]), operand2, Ô1Õ); // RSB
result = AddWithCarry (~(Rn), operand2, 1);
break;
- case 4: // when ‘0100’
- // (result, -, -) = AddWithCarry(R[n], operand2, ‘0’); // ADD
+ case 4: // when Ô0100Õ
+ // (result, -, -) = AddWithCarry(R[n], operand2, Ô0Õ); // ADD
result = AddWithCarry (Rn, operand2, 0);
break;
- case 5: // when ‘0101’
+ case 5: // when Ô0101Õ
// (result, -, -) = AddWithCarry(R[n], operand2, APSR.c); // ADC
result = AddWithCarry (Rn, operand2, APSR_C);
break;
- case 6: // when ‘0110’
+ case 6: // when Ô0110Õ
// (result, -, -) = AddWithCarry(R[n], NOT(operand2), APSR.C); // SBC
result = AddWithCarry (Rn, ~(operand2), APSR_C);
break;
- case 7: // when ‘0111’
+ case 7: // when Ô0111Õ
// (result, -, -) = AddWithCarry(NOT(R[n]), operand2, APSR.C); // RSC
result = AddWithCarry (~(Rn), operand2, APSR_C);
break;
- case 10: // when ‘1100’
+ case 10: // when Ô1100Õ
// result = R[n] OR operand2; // ORR
result.result = Rn | operand2;
break;
- case 11: // when ‘1101’
+ case 11: // when Ô1101Õ
// result = operand2; // MOV
result.result = operand2;
break;
- case 12: // when ‘1110’
+ case 12: // when Ô1110Õ
// result = R[n] AND NOT(operand2); // BIC
result.result = Rn & ~(operand2);
break;
- case 15: // when ‘1111’
+ case 15: // when Ô1111Õ
// result = NOT(operand2); // MVN
result.result = ~(operand2);
break;
@@ -12065,7 +12063,7 @@
default:
return false;
}
- // CPSRWriteByInstr(SPSR[], ‘1111’, TRUE);
+ // CPSRWriteByInstr(SPSR[], Ô1111Õ, TRUE);
// For now, in emulation mode, we don't have access to the SPSR, so we will use the CPSR instead, and hope for
// the best.
@@ -13249,9 +13247,9 @@
if (m_opcode_cpsr == 0 || m_ignore_conditions == false)
{
m_opcode_cpsr = ReadRegisterUnsigned (eRegisterKindDWARF,
- dwarf_cpsr,
- 0,
- &success);
+ dwarf_cpsr,
+ 0,
+ &success);
}
// Only return false if we are unable to read the CPSR if we care about conditions