Add helper methods InITBlock() and LastInITBlock() to EmulateInstructionARM class
instead of calling out to m_it_session.InITBlock()/LastInITBlock(), which simplifies
the coding a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125421 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
index 0513042..278928d 100644
--- a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@@ -364,11 +364,16 @@
// if BitCount(registers) < 2 || (P == '1' && M == '1') then UNPREDICTABLE;
if (BitCount(registers) < 2 || (Bit32(opcode, 15) && Bit32(opcode, 14)))
return false;
+ // if registers<15> == '1' && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+ if (BitIsSet(registers, 15) && InITBlock() && !LastInITBlock())
+ return false;
break;
case eEncodingT3:
Rt = Bits32(opcode, 15, 12);
// if t == 13 || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
- if (Rt == dwarf_sp)
+ if (Rt == 13)
+ return false;
+ if (Rt == 15 && InITBlock() && !LastInITBlock())
return false;
registers = (1u << Rt);
break;
@@ -379,7 +384,7 @@
// if BitCount(register_list) < 2 then SEE LDM / LDMIA / LDMFD;
// if registers<13> == ‘1’ && ArchVersion() >= 7 then UNPREDICTABLE;
- if (Bit32(opcode, 13) && ArchVersion() >= ARMv7)
+ if (BitIsSet(opcode, 13) && ArchVersion() >= ARMv7)
return false;
break;
case eEncodingA2:
@@ -701,9 +706,7 @@
Rt = Bits32(opcode, 15, 12);
imm32 = Bits32(opcode, 11, 0) << 2; // imm32 = ZeroExtend(imm12, 32);
add = BitIsSet(opcode, 23);
- if (Rt == 15
- && m_it_session.InITBlock()
- && !m_it_session.LastInITBlock())
+ if (Rt == 15 && InITBlock() && !LastInITBlock())
return false;
base = Align(pc + 4, 4);
context.arg2 = 4 + imm32;
@@ -914,7 +917,7 @@
target = pc + 4 + imm32;
context.arg1 = 4 + imm32; // signed offset
context.arg2 = eModeThumb; // target instruction set
- if (m_it_session.InITBlock() && !m_it_session.LastInITBlock())
+ if (InITBlock() && !LastInITBlock())
return false;
break;
}
@@ -933,7 +936,7 @@
target = Align(pc + 4, 4) + imm32;
context.arg1 = 4 + imm32; // signed offset
context.arg2 = eModeARM; // target instruction set
- if (m_it_session.InITBlock() && !m_it_session.LastInITBlock())
+ if (InITBlock() && !LastInITBlock())
return false;
break;
}
@@ -1004,7 +1007,7 @@
// if m == 15 then UNPREDICTABLE;
if (Rm == 15)
return false;
- if (m_it_session.InITBlock() && !m_it_session.LastInITBlock())
+ if (InITBlock() && !LastInITBlock())
return false;
break;
case eEncodingA1:
@@ -1056,7 +1059,7 @@
switch (encoding) {
case eEncodingT1:
Rm = Bits32(opcode, 6, 3);
- if (m_it_session.InITBlock() && !m_it_session.LastInITBlock())
+ if (InITBlock() && !LastInITBlock())
return false;
break;
case eEncodingA1:
@@ -1959,9 +1962,7 @@
|| (BitCount (registers) < 2)
|| (BitIsSet (opcode, 14) && BitIsSet (opcode, 15)))
return false;
- if (BitIsSet (registers, 15)
- && m_it_session.InITBlock()
- && !m_it_session.LastInITBlock())
+ if (BitIsSet (registers, 15) && InITBlock() && !LastInITBlock())
return false;
if (wback
&& BitIsSet (registers, n))
@@ -2208,9 +2209,7 @@
return false;
// if registers<15> == ’1’ && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- if (BitIsSet (registers, 15)
- && m_it_session.InITBlock()
- && !m_it_session.LastInITBlock())
+ if (BitIsSet (registers, 15) && InITBlock() && !LastInITBlock())
return false;
// if wback && registers<n> == ’1’ then UNPREDICTABLE;
@@ -3048,6 +3047,18 @@
}
bool
+EmulateInstructionARM::InITBlock()
+{
+ return CurrentInstrSet() == eModeThumb && m_it_session.InITBlock();
+}
+
+bool
+EmulateInstructionARM::LastInITBlock()
+{
+ return CurrentInstrSet() == eModeThumb && m_it_session.LastInITBlock();
+}
+
+bool
EmulateInstructionARM::BranchWritePC (const Context &context, uint32_t addr)
{
addr_t target;