Add two convenience functions: DecodeImmShiftThumb() and DecodeImmShiftARM() to ARMUtils.h.
Use them within EmulateInstructionARM.cpp to save repetitive typing.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126247 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
index e9f7a7b..2669b0e 100644
--- a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@@ -829,7 +829,7 @@
Rd = Bits32(opcode, 11, 8);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
+ shift_n = DecodeImmShiftThumb(opcode, shift_t);
// if (BadReg(d) || BadReg(m)) then UNPREDICTABLE;
if ((BadReg(Rd) || BadReg(Rm)))
return false;
@@ -837,7 +837,7 @@
Rd = Bits32(opcode, 15, 12);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
break;
default:
return false;
@@ -2128,7 +2128,7 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
break;
default:
return false;
@@ -2245,7 +2245,7 @@
case eEncodingT2:
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
- shift_n = DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
+ shift_n = DecodeImmShiftThumb(opcode, shift_t);
// if n == 15 || BadReg(m) then UNPREDICTABLE;
if (Rn == 15 || BadReg(Rm))
return false;
@@ -2253,7 +2253,7 @@
case eEncodingA1:
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
default:
return false;
}
@@ -2380,7 +2380,7 @@
case eEncodingA1:
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
default:
return false;
}
@@ -4588,7 +4588,7 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
+ shift_n = DecodeImmShiftThumb(opcode, shift_t);
if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm))
return false;
break;
@@ -4597,7 +4597,7 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
// TODO: Emulate SUBS PC, LR and related instructions.
if (Rd == 15 && setflags)
return false;
@@ -4752,7 +4752,7 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
+ shift_n = DecodeImmShiftThumb(opcode, shift_t);
// if Rd == '1111' && S == '1' then SEE TST (register);
if (Rd == 15 && setflags)
return EmulateTSTReg(eEncodingT2);
@@ -4764,7 +4764,7 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
// TODO: Emulate SUBS PC, LR and related instructions.
if (Rd == 15 && setflags)
return false;
@@ -5651,8 +5651,8 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
- // if Rd == ‘1111’ && S == ‘1’ then SEE TEQ (register);
+ shift_n = DecodeImmShiftThumb(opcode, shift_t);
+ // if Rd == '1111' && S == '1' then SEE TEQ (register);
if (Rd == 15 && setflags)
return EmulateTEQReg(eEncodingT1);
if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm))
@@ -5663,7 +5663,7 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
// if Rd == '1111' && S == '1' then SEE SUBS PC, LR and related instructions;
// TODO: Emulate SUBS PC, LR and related instructions.
if (Rd == 15 && setflags)
@@ -5820,8 +5820,8 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
- // if Rn == ‘1111’ then SEE MOV (register);
+ shift_n = DecodeImmShiftThumb(opcode, shift_t);
+ // if Rn == '1111' then SEE MOV (register);
if (Rn == 15)
return EmulateMOVRdRm(eEncodingT3);
if (BadReg(Rd) || Rn == 13 || BadReg(Rm))
@@ -5832,7 +5832,7 @@
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
setflags = BitIsSet(opcode, 20);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
// TODO: Emulate SUBS PC, LR and related instructions.
if (Rd == 15 && setflags)
return false;
@@ -5957,14 +5957,14 @@
case eEncodingT1:
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
- shift_n = DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
+ shift_n = DecodeImmShiftThumb(opcode, shift_t);
if (BadReg(Rn) || BadReg(Rm))
return false;
break;
case eEncodingA1:
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
break;
default:
return false;
@@ -6090,14 +6090,14 @@
case eEncodingT2:
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
- shift_n = DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
+ shift_n = DecodeImmShiftThumb(opcode, shift_t);
if (BadReg(Rn) || BadReg(Rm))
return false;
break;
case eEncodingA1:
Rn = Bits32(opcode, 19, 16);
Rm = Bits32(opcode, 3, 0);
- shift_n = DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+ shift_n = DecodeImmShiftARM(opcode, shift_t);
break;
default:
return false;