Add emulation methods for LSL (immediate), LSL (register), LSR (immediate), and LSR (register).
Create two helper methods EmulateShiftImm() and EmulateShiftReg() and have ASR, LSL, and LSR
delegate to the helper methods which take an extra ARM_ShifterType parameter.
The opcodes tables have not been updated yet to reflect these new entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125633 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/source/Plugins/Process/Utility/ARMDefines.h b/source/Plugins/Process/Utility/ARMDefines.h
index 6453a3c..9a4dcc1 100644
--- a/source/Plugins/Process/Utility/ARMDefines.h
+++ b/source/Plugins/Process/Utility/ARMDefines.h
@@ -10,12 +10,20 @@
#ifndef lldb_ARMDefines_h_
#define lldb_ARMDefines_h_
-#include "InstructionUtils.h"
-
// Common defintions for the ARM/Thumb Instruction Set Architecture.
namespace lldb_private {
+// ARM shifter types
+typedef enum
+{
+ SRType_LSL,
+ SRType_LSR,
+ SRType_ASR,
+ SRType_ROR,
+ SRType_RRX
+} ARM_ShifterType;
+
// ARM conditions // Meaning (integer) Meaning (floating-point) Condition flags
#define COND_EQ 0x0 // Equal Equal Z == 1
#define COND_NE 0x1 // Not equal Not equal, or unordered Z == 0
diff --git a/source/Plugins/Process/Utility/ARMUtils.h b/source/Plugins/Process/Utility/ARMUtils.h
index 523d0fc..53a04bb 100644
--- a/source/Plugins/Process/Utility/ARMUtils.h
+++ b/source/Plugins/Process/Utility/ARMUtils.h
@@ -10,6 +10,7 @@
#ifndef lldb_ARMUtils_h_
#define lldb_ARMUtils_h_
+#include "ARMDefines.h"
#include "InstructionUtils.h"
#include "llvm/Support/MathExtras.h" // for SignExtend64 template function
@@ -17,15 +18,6 @@
namespace lldb_private {
-typedef enum
-{
- SRType_LSL,
- SRType_LSR,
- SRType_ASR,
- SRType_ROR,
- SRType_RRX
-} ARM_ShifterType;
-
static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5, ARM_ShifterType &shift_t)
{
switch (type) {