Add a new member variable m_new_inst_cpsr to catch the to-be-updated state
of the CPSR during the course of executing an opcode, and modified SelectInstrSet()
to update this variable instead of the original m_inst_cpsr, which should be
the cached copy of the CPSR at the beginning of executing the opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@125244 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
index ddede61..bfc6827 100644
--- a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@@ -2373,7 +2373,7 @@
if (cpsr_changed)
{
- if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS, m_inst_cpsr))
+ if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS, m_new_inst_cpsr))
return false;
}
if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, target))
@@ -2409,21 +2409,23 @@
}
// Set the 'T' bit of our CPSR. The m_inst_mode gets updated when the next
-// ReadInstruction() is performed.
+// ReadInstruction() is performed. This function has a side effect of updating
+// the m_new_inst_cpsr member variable if necessary.
bool
EmulateInstructionARM::SelectInstrSet (Mode arm_or_thumb)
{
+ m_new_inst_cpsr = m_inst_cpsr;
switch (arm_or_thumb)
{
default:
return false;
eModeARM:
// Clear the T bit.
- m_inst_cpsr &= ~MASK_CPSR_T;
+ m_new_inst_cpsr &= ~MASK_CPSR_T;
break;
eModeThumb:
// Set the T bit.
- m_inst_cpsr |= MASK_CPSR_T;
+ m_new_inst_cpsr |= MASK_CPSR_T;
break;
}
return true;