Make the assembler mnemonic lowercase.


git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@124147 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/source/Plugins/Process/Utility/EmulateInstructionARM.cpp b/source/Plugins/Process/Utility/EmulateInstructionARM.cpp
index 772e2bb..91eb021 100644
--- a/source/Plugins/Process/Utility/EmulateInstructionARM.cpp
+++ b/source/Plugins/Process/Utility/EmulateInstructionARM.cpp
@@ -189,15 +189,15 @@
 static ARMOpcode g_arm_opcodes[] =
 {
     { 0x0000fe00, 0x0000b400, ARMvAll,       eEncodingT1, eSize16, EmulateARMPushEncoding,
-      "PUSH<c> <registers>" },
+      "push<c> <registers>" },
     { 0xffff0000, 0xe8ad0000, ARMv6T2|ARMv7, eEncodingT2, eSize32, EmulateARMPushEncoding,
-      "PUSH<c>.W <registers> ; <registers> contains more than one register" },
+      "push<c>.w <registers> ; <registers> contains more than one register" },
     { 0xffff0fff, 0xf84d0d04, ARMv6T2|ARMv7, eEncodingT3, eSize32, EmulateARMPushEncoding,
-      "PUSH<c>.W <registers> ; <registers> contains one register, <Rt>" },
+      "push<c>.w <registers> ; <registers> contains one register, <Rt>" },
     { 0x0fff0000, 0x092d0000, ARMvAll,       eEncodingA1, eSize32, EmulateARMPushEncoding,
-      "PUSH<c> <registers> ; <registers> contains more than one register" },
+      "push<c> <registers> ; <registers> contains more than one register" },
     { 0x0fff0fff, 0x052d0004, ARMvAll,       eEncodingA2, eSize32, EmulateARMPushEncoding,
-      "PUSH<c> <registers> ; <registers> contains one register, <Rt>" }
+      "push<c> <registers> ; <registers> contains one register, <Rt>" }
 };
 
 static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode);