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Greg Clayton64c84432011-01-21 22:02:52 +00001//===-- EmulateInstruction.h ------------------------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
Greg Clayton17f5afe2011-02-05 02:56:16 +000010#include "lldb/Core/EmulateInstruction.h"
Greg Clayton64c84432011-01-21 22:02:52 +000011
Greg Clayton888a7332011-04-26 04:39:08 +000012#include "lldb/Core/Address.h"
Caroline Tice080bf612011-04-05 18:46:00 +000013#include "lldb/Core/DataBufferHeap.h"
Greg Clayton64c84432011-01-21 22:02:52 +000014#include "lldb/Core/DataExtractor.h"
Caroline Tice080bf612011-04-05 18:46:00 +000015#include "lldb/Core/Error.h"
Greg Clayton52fd9842011-02-02 02:24:04 +000016#include "lldb/Core/PluginManager.h"
Greg Clayton061b79d2011-05-09 20:18:18 +000017#include "lldb/Core/RegisterValue.h"
18#include "lldb/Core/StreamFile.h"
Greg Clayton64c84432011-01-21 22:02:52 +000019#include "lldb/Core/StreamString.h"
Greg Claytoncd548032011-02-01 01:31:41 +000020#include "lldb/Host/Endian.h"
Greg Claytonc07d4512011-04-26 23:48:45 +000021#include "lldb/Symbol/UnwindPlan.h"
Caroline Tice080bf612011-04-05 18:46:00 +000022#include "lldb/Target/Process.h"
23#include "lldb/Target/RegisterContext.h"
Greg Clayton888a7332011-04-26 04:39:08 +000024#include "lldb/Target/Target.h"
Caroline Tice080bf612011-04-05 18:46:00 +000025#include "lldb/Target/Thread.h"
26
Greg Clayton64c84432011-01-21 22:02:52 +000027using namespace lldb;
28using namespace lldb_private;
29
Greg Clayton52fd9842011-02-02 02:24:04 +000030EmulateInstruction*
Greg Clayton888a7332011-04-26 04:39:08 +000031EmulateInstruction::FindPlugin (const ArchSpec &arch, InstructionType supported_inst_type, const char *plugin_name)
Greg Clayton52fd9842011-02-02 02:24:04 +000032{
33 EmulateInstructionCreateInstance create_callback = NULL;
34 if (plugin_name)
35 {
36 create_callback = PluginManager::GetEmulateInstructionCreateCallbackForPluginName (plugin_name);
37 if (create_callback)
38 {
Greg Clayton888a7332011-04-26 04:39:08 +000039 EmulateInstruction *emulate_insn_ptr = create_callback(arch, supported_inst_type);
Caroline Tice080bf612011-04-05 18:46:00 +000040 if (emulate_insn_ptr)
41 return emulate_insn_ptr;
Greg Clayton52fd9842011-02-02 02:24:04 +000042 }
43 }
44 else
45 {
46 for (uint32_t idx = 0; (create_callback = PluginManager::GetEmulateInstructionCreateCallbackAtIndex(idx)) != NULL; ++idx)
47 {
Greg Clayton888a7332011-04-26 04:39:08 +000048 EmulateInstruction *emulate_insn_ptr = create_callback(arch, supported_inst_type);
Caroline Tice080bf612011-04-05 18:46:00 +000049 if (emulate_insn_ptr)
50 return emulate_insn_ptr;
Greg Clayton52fd9842011-02-02 02:24:04 +000051 }
52 }
53 return NULL;
54}
Greg Clayton64c84432011-01-21 22:02:52 +000055
Greg Clayton888a7332011-04-26 04:39:08 +000056EmulateInstruction::EmulateInstruction (const ArchSpec &arch) :
Caroline Tice080bf612011-04-05 18:46:00 +000057 m_arch (arch),
58 m_baton (NULL),
59 m_read_mem_callback (&ReadMemoryDefault),
60 m_write_mem_callback (&WriteMemoryDefault),
61 m_read_reg_callback (&ReadRegisterDefault),
62 m_write_reg_callback (&WriteRegisterDefault),
Greg Clayton3063c952011-04-29 22:50:31 +000063 m_addr (LLDB_INVALID_ADDRESS)
Caroline Tice080bf612011-04-05 18:46:00 +000064{
65 ::memset (&m_opcode, 0, sizeof (m_opcode));
66}
67
Greg Claytonc07d4512011-04-26 23:48:45 +000068
Greg Clayton061b79d2011-05-09 20:18:18 +000069bool
70EmulateInstruction::ReadRegister (const RegisterInfo *reg_info, RegisterValue& reg_value)
71{
72 if (m_read_reg_callback)
73 return m_read_reg_callback (this, m_baton, reg_info, reg_value);
74 return false;
75}
76
77bool
78EmulateInstruction::ReadRegister (uint32_t reg_kind, uint32_t reg_num, RegisterValue& reg_value)
Greg Clayton64c84432011-01-21 22:02:52 +000079{
Greg Claytonc07d4512011-04-26 23:48:45 +000080 RegisterInfo reg_info;
81 if (GetRegisterInfo(reg_kind, reg_num, reg_info))
Greg Clayton061b79d2011-05-09 20:18:18 +000082 return ReadRegister (&reg_info, reg_value);
83 return false;
84}
85
86uint64_t
87EmulateInstruction::ReadRegisterUnsigned (uint32_t reg_kind,
88 uint32_t reg_num,
89 uint64_t fail_value,
90 bool *success_ptr)
91{
92 RegisterValue reg_value;
93 if (ReadRegister (reg_kind, reg_num, reg_value))
94 return reg_value.GetAsUInt64(fail_value, success_ptr);
Greg Claytonc07d4512011-04-26 23:48:45 +000095 if (success_ptr)
96 *success_ptr = false;
97 return fail_value;
98}
99
100uint64_t
Greg Clayton061b79d2011-05-09 20:18:18 +0000101EmulateInstruction::ReadRegisterUnsigned (const RegisterInfo *reg_info,
102 uint64_t fail_value,
103 bool *success_ptr)
Greg Claytonc07d4512011-04-26 23:48:45 +0000104{
Greg Clayton061b79d2011-05-09 20:18:18 +0000105 RegisterValue reg_value;
106 if (ReadRegister (reg_info, reg_value))
107 return reg_value.GetAsUInt64(fail_value, success_ptr);
Greg Clayton64c84432011-01-21 22:02:52 +0000108 if (success_ptr)
Greg Clayton061b79d2011-05-09 20:18:18 +0000109 *success_ptr = false;
110 return fail_value;
Greg Clayton64c84432011-01-21 22:02:52 +0000111}
112
113bool
Greg Clayton061b79d2011-05-09 20:18:18 +0000114EmulateInstruction::WriteRegister (const Context &context,
115 const RegisterInfo *reg_info,
116 const RegisterValue& reg_value)
Greg Clayton64c84432011-01-21 22:02:52 +0000117{
Greg Clayton061b79d2011-05-09 20:18:18 +0000118 if (m_write_reg_callback)
119 return m_write_reg_callback (this, m_baton, context, reg_info, reg_value);
Greg Claytonc07d4512011-04-26 23:48:45 +0000120 return false;
121}
122
123bool
Greg Clayton061b79d2011-05-09 20:18:18 +0000124EmulateInstruction::WriteRegister (const Context &context,
125 uint32_t reg_kind,
126 uint32_t reg_num,
127 const RegisterValue& reg_value)
Greg Claytonc07d4512011-04-26 23:48:45 +0000128{
Greg Clayton061b79d2011-05-09 20:18:18 +0000129 RegisterInfo reg_info;
130 if (GetRegisterInfo(reg_kind, reg_num, reg_info))
131 return WriteRegister (context, &reg_info, reg_value);
132 return false;
133}
134
135
136bool
137EmulateInstruction::WriteRegisterUnsigned (const Context &context,
138 uint32_t reg_kind,
139 uint32_t reg_num,
140 uint64_t uint_value)
141{
142
143 RegisterInfo reg_info;
144 if (GetRegisterInfo(reg_kind, reg_num, reg_info))
145 {
146 RegisterValue reg_value;
147 if (reg_value.SetUInt(uint_value, reg_info.byte_size))
148 return WriteRegister (context, &reg_info, reg_value);
149 }
150 return false;
151}
152
153bool
154EmulateInstruction::WriteRegisterUnsigned (const Context &context,
155 const RegisterInfo *reg_info,
156 uint64_t uint_value)
157{
158
159 if (reg_info)
160 {
161 RegisterValue reg_value;
162 if (reg_value.SetUInt(uint_value, reg_info->byte_size))
163 return WriteRegister (context, reg_info, reg_value);
164 }
165 return false;
166}
167
168size_t
169EmulateInstruction::ReadMemory (const Context &context,
170 lldb::addr_t addr,
171 void *dst,
172 size_t dst_len)
173{
174 if (m_read_mem_callback)
175 return m_read_mem_callback (this, m_baton, context, addr, dst, dst_len) == dst_len;
176 return false;
Greg Clayton64c84432011-01-21 22:02:52 +0000177}
178
179uint64_t
180EmulateInstruction::ReadMemoryUnsigned (const Context &context, lldb::addr_t addr, size_t byte_size, uint64_t fail_value, bool *success_ptr)
181{
182 uint64_t uval64 = 0;
183 bool success = false;
184 if (byte_size <= 8)
185 {
186 uint8_t buf[sizeof(uint64_t)];
Greg Clayton888a7332011-04-26 04:39:08 +0000187 size_t bytes_read = m_read_mem_callback (this, m_baton, context, addr, buf, byte_size);
Greg Clayton64c84432011-01-21 22:02:52 +0000188 if (bytes_read == byte_size)
189 {
190 uint32_t offset = 0;
Greg Clayton888a7332011-04-26 04:39:08 +0000191 DataExtractor data (buf, byte_size, GetByteOrder(), GetAddressByteSize());
Greg Clayton64c84432011-01-21 22:02:52 +0000192 uval64 = data.GetMaxU64 (&offset, byte_size);
193 success = true;
194 }
195 }
196
197 if (success_ptr)
198 *success_ptr = success;
199
200 if (!success)
201 uval64 = fail_value;
202 return uval64;
203}
204
205
206bool
207EmulateInstruction::WriteMemoryUnsigned (const Context &context,
208 lldb::addr_t addr,
209 uint64_t uval,
210 size_t uval_byte_size)
211{
212 StreamString strm(Stream::eBinary, GetAddressByteSize(), GetByteOrder());
213 strm.PutMaxHex64 (uval, uval_byte_size);
214
Greg Clayton888a7332011-04-26 04:39:08 +0000215 size_t bytes_written = m_write_mem_callback (this, m_baton, context, addr, strm.GetData(), uval_byte_size);
Greg Clayton64c84432011-01-21 22:02:52 +0000216 if (bytes_written == uval_byte_size)
217 return true;
218 return false;
219}
Caroline Tice080bf612011-04-05 18:46:00 +0000220
Greg Clayton061b79d2011-05-09 20:18:18 +0000221bool
222EmulateInstruction::WriteMemory (const Context &context,
223 lldb::addr_t addr,
224 const void *src,
225 size_t src_len)
226{
227 if (m_write_mem_callback)
228 return m_write_mem_callback (this, m_baton, context, addr, src, src_len) == src_len;
229 return false;
230}
231
Caroline Tice080bf612011-04-05 18:46:00 +0000232
233void
234EmulateInstruction::SetBaton (void *baton)
235{
236 m_baton = baton;
237}
238
239void
Greg Clayton061b79d2011-05-09 20:18:18 +0000240EmulateInstruction::SetCallbacks (ReadMemoryCallback read_mem_callback,
241 WriteMemoryCallback write_mem_callback,
242 ReadRegisterCallback read_reg_callback,
243 WriteRegisterCallback write_reg_callback)
Caroline Tice080bf612011-04-05 18:46:00 +0000244{
245 m_read_mem_callback = read_mem_callback;
246 m_write_mem_callback = write_mem_callback;
247 m_read_reg_callback = read_reg_callback;
248 m_write_reg_callback = write_reg_callback;
249}
250
251void
Greg Clayton061b79d2011-05-09 20:18:18 +0000252EmulateInstruction::SetReadMemCallback (ReadMemoryCallback read_mem_callback)
Caroline Tice080bf612011-04-05 18:46:00 +0000253{
254 m_read_mem_callback = read_mem_callback;
255}
256
257
258void
Greg Clayton061b79d2011-05-09 20:18:18 +0000259EmulateInstruction::SetWriteMemCallback (WriteMemoryCallback write_mem_callback)
Caroline Tice080bf612011-04-05 18:46:00 +0000260{
261 m_write_mem_callback = write_mem_callback;
262}
263
264
265void
Greg Clayton061b79d2011-05-09 20:18:18 +0000266EmulateInstruction::SetReadRegCallback (ReadRegisterCallback read_reg_callback)
Caroline Tice080bf612011-04-05 18:46:00 +0000267{
268 m_read_reg_callback = read_reg_callback;
269}
270
271
272void
Greg Clayton061b79d2011-05-09 20:18:18 +0000273EmulateInstruction::SetWriteRegCallback (WriteRegisterCallback write_reg_callback)
Caroline Tice080bf612011-04-05 18:46:00 +0000274{
275 m_write_reg_callback = write_reg_callback;
276}
277
278
279
280//
281// Read & Write Memory and Registers callback functions.
282//
283
284size_t
Greg Clayton888a7332011-04-26 04:39:08 +0000285EmulateInstruction::ReadMemoryFrame (EmulateInstruction *instruction,
286 void *baton,
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000287 const Context &context,
288 lldb::addr_t addr,
289 void *dst,
290 size_t length)
Caroline Tice080bf612011-04-05 18:46:00 +0000291{
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000292 if (!baton)
Caroline Tice080bf612011-04-05 18:46:00 +0000293 return 0;
294
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000295
296 StackFrame *frame = (StackFrame *) baton;
297
Caroline Tice080bf612011-04-05 18:46:00 +0000298 DataBufferSP data_sp (new DataBufferHeap (length, '\0'));
299 Error error;
300
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000301 size_t bytes_read = frame->GetThread().GetProcess().ReadMemory (addr, data_sp->GetBytes(), data_sp->GetByteSize(),
302 error);
Caroline Tice080bf612011-04-05 18:46:00 +0000303
304 if (bytes_read > 0)
305 ((DataBufferHeap *) data_sp.get())->CopyData (dst, length);
306
307 return bytes_read;
308}
309
310size_t
Greg Clayton888a7332011-04-26 04:39:08 +0000311EmulateInstruction::WriteMemoryFrame (EmulateInstruction *instruction,
312 void *baton,
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000313 const Context &context,
314 lldb::addr_t addr,
315 const void *dst,
316 size_t length)
Caroline Tice080bf612011-04-05 18:46:00 +0000317{
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000318 if (!baton)
Caroline Tice080bf612011-04-05 18:46:00 +0000319 return 0;
320
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000321 StackFrame *frame = (StackFrame *) baton;
322
Caroline Tice080bf612011-04-05 18:46:00 +0000323 lldb::DataBufferSP data_sp (new DataBufferHeap (dst, length));
324 if (data_sp)
325 {
326 length = data_sp->GetByteSize();
327 if (length > 0)
328 {
329 Error error;
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000330 size_t bytes_written = frame->GetThread().GetProcess().WriteMemory (addr, data_sp->GetBytes(), length,
331 error);
Caroline Tice080bf612011-04-05 18:46:00 +0000332
333 return bytes_written;
334 }
335 }
336
337 return 0;
338}
339
340bool
Greg Clayton888a7332011-04-26 04:39:08 +0000341EmulateInstruction::ReadRegisterFrame (EmulateInstruction *instruction,
342 void *baton,
Greg Clayton061b79d2011-05-09 20:18:18 +0000343 const RegisterInfo *reg_info,
344 RegisterValue &reg_value)
Caroline Tice080bf612011-04-05 18:46:00 +0000345{
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000346 if (!baton)
Caroline Tice080bf612011-04-05 18:46:00 +0000347 return false;
348
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000349 StackFrame *frame = (StackFrame *) baton;
Greg Clayton061b79d2011-05-09 20:18:18 +0000350 return frame->GetRegisterContext()->ReadRegister (reg_info, reg_value);
Caroline Tice080bf612011-04-05 18:46:00 +0000351}
352
353bool
Greg Clayton888a7332011-04-26 04:39:08 +0000354EmulateInstruction::WriteRegisterFrame (EmulateInstruction *instruction,
355 void *baton,
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000356 const Context &context,
Greg Clayton061b79d2011-05-09 20:18:18 +0000357 const RegisterInfo *reg_info,
358 const RegisterValue &reg_value)
Caroline Tice080bf612011-04-05 18:46:00 +0000359{
Caroline Ticeea69d6d2011-04-05 20:18:48 +0000360 if (!baton)
361 return false;
362
363 StackFrame *frame = (StackFrame *) baton;
Greg Clayton061b79d2011-05-09 20:18:18 +0000364 return frame->GetRegisterContext()->WriteRegister (reg_info, reg_value);
Caroline Tice080bf612011-04-05 18:46:00 +0000365}
366
367size_t
Greg Clayton888a7332011-04-26 04:39:08 +0000368EmulateInstruction::ReadMemoryDefault (EmulateInstruction *instruction,
369 void *baton,
Caroline Tice080bf612011-04-05 18:46:00 +0000370 const Context &context,
371 lldb::addr_t addr,
372 void *dst,
373 size_t length)
374{
Greg Clayton75906e42011-05-11 18:39:18 +0000375 StreamFile strm (stdout, false);
376 strm.Printf (" Read from Memory (address = 0x%llx, length = %zu, context = ", addr, length);
377 context.Dump (strm, instruction);
378 strm.EOL();
Caroline Tice080bf612011-04-05 18:46:00 +0000379 *((uint64_t *) dst) = 0xdeadbeef;
380 return length;
381}
382
383size_t
Greg Clayton888a7332011-04-26 04:39:08 +0000384EmulateInstruction::WriteMemoryDefault (EmulateInstruction *instruction,
385 void *baton,
Caroline Tice080bf612011-04-05 18:46:00 +0000386 const Context &context,
387 lldb::addr_t addr,
388 const void *dst,
389 size_t length)
390{
Greg Clayton75906e42011-05-11 18:39:18 +0000391 StreamFile strm (stdout, false);
392 strm.Printf (" Write to Memory (address = 0x%llx, length = %zu, context = ", addr, length);
393 context.Dump (strm, instruction);
394 strm.EOL();
Caroline Tice080bf612011-04-05 18:46:00 +0000395 return length;
396}
397
398bool
Greg Clayton888a7332011-04-26 04:39:08 +0000399EmulateInstruction::ReadRegisterDefault (EmulateInstruction *instruction,
400 void *baton,
Greg Clayton061b79d2011-05-09 20:18:18 +0000401 const RegisterInfo *reg_info,
402 RegisterValue &reg_value)
Caroline Tice080bf612011-04-05 18:46:00 +0000403{
Greg Clayton75906e42011-05-11 18:39:18 +0000404 StreamFile strm (stdout, false);
405 strm.Printf (" Read Register (%s)\n", reg_info->name);
Greg Claytonc07d4512011-04-26 23:48:45 +0000406 uint32_t reg_kind, reg_num;
407 if (GetBestRegisterKindAndNumber (reg_info, reg_kind, reg_num))
Greg Clayton061b79d2011-05-09 20:18:18 +0000408 reg_value.SetUInt64((uint64_t)reg_kind << 24 | reg_num);
Greg Claytonc07d4512011-04-26 23:48:45 +0000409 else
Greg Clayton061b79d2011-05-09 20:18:18 +0000410 reg_value.SetUInt64(0);
Greg Claytonc07d4512011-04-26 23:48:45 +0000411
Caroline Tice080bf612011-04-05 18:46:00 +0000412 return true;
413}
414
415bool
Greg Clayton888a7332011-04-26 04:39:08 +0000416EmulateInstruction::WriteRegisterDefault (EmulateInstruction *instruction,
417 void *baton,
Caroline Tice080bf612011-04-05 18:46:00 +0000418 const Context &context,
Greg Clayton061b79d2011-05-09 20:18:18 +0000419 const RegisterInfo *reg_info,
420 const RegisterValue &reg_value)
Caroline Tice080bf612011-04-05 18:46:00 +0000421{
Greg Clayton061b79d2011-05-09 20:18:18 +0000422 StreamFile strm (stdout, false);
423 strm.Printf (" Write to Register (name = %s, value = " , reg_info->name);
424 reg_value.Dump(&strm, reg_info, false);
425 strm.PutCString (", context = ");
Greg Clayton75906e42011-05-11 18:39:18 +0000426 context.Dump (strm, instruction);
427 strm.EOL();
Caroline Tice080bf612011-04-05 18:46:00 +0000428 return true;
429}
430
431void
Greg Clayton75906e42011-05-11 18:39:18 +0000432EmulateInstruction::Context::Dump (Stream &strm,
Greg Claytonc07d4512011-04-26 23:48:45 +0000433 EmulateInstruction *instruction) const
Caroline Tice080bf612011-04-05 18:46:00 +0000434{
Greg Claytonc07d4512011-04-26 23:48:45 +0000435 switch (type)
Caroline Tice080bf612011-04-05 18:46:00 +0000436 {
437 case eContextReadOpcode:
Greg Clayton75906e42011-05-11 18:39:18 +0000438 strm.PutCString ("reading opcode");
Caroline Tice080bf612011-04-05 18:46:00 +0000439 break;
440
441 case eContextImmediate:
Greg Clayton75906e42011-05-11 18:39:18 +0000442 strm.PutCString ("immediate");
Caroline Tice080bf612011-04-05 18:46:00 +0000443 break;
444
445 case eContextPushRegisterOnStack:
Greg Clayton75906e42011-05-11 18:39:18 +0000446 strm.PutCString ("push register");
Caroline Tice080bf612011-04-05 18:46:00 +0000447 break;
448
449 case eContextPopRegisterOffStack:
Greg Clayton75906e42011-05-11 18:39:18 +0000450 strm.PutCString ("pop register");
Caroline Tice080bf612011-04-05 18:46:00 +0000451 break;
452
453 case eContextAdjustStackPointer:
Greg Clayton75906e42011-05-11 18:39:18 +0000454 strm.PutCString ("adjust sp");
Caroline Tice080bf612011-04-05 18:46:00 +0000455 break;
456
457 case eContextAdjustBaseRegister:
Greg Clayton75906e42011-05-11 18:39:18 +0000458 strm.PutCString ("adjusting (writing value back to) a base register");
Caroline Tice080bf612011-04-05 18:46:00 +0000459 break;
460
461 case eContextRegisterPlusOffset:
Greg Clayton75906e42011-05-11 18:39:18 +0000462 strm.PutCString ("register + offset");
Caroline Tice080bf612011-04-05 18:46:00 +0000463 break;
464
465 case eContextRegisterStore:
Greg Clayton75906e42011-05-11 18:39:18 +0000466 strm.PutCString ("store register");
Caroline Tice080bf612011-04-05 18:46:00 +0000467 break;
468
469 case eContextRegisterLoad:
Greg Clayton75906e42011-05-11 18:39:18 +0000470 strm.PutCString ("load register");
Caroline Tice080bf612011-04-05 18:46:00 +0000471 break;
472
473 case eContextRelativeBranchImmediate:
Greg Clayton75906e42011-05-11 18:39:18 +0000474 strm.PutCString ("relative branch immediate");
Caroline Tice080bf612011-04-05 18:46:00 +0000475 break;
476
477 case eContextAbsoluteBranchRegister:
Greg Clayton75906e42011-05-11 18:39:18 +0000478 strm.PutCString ("absolute branch register");
Caroline Tice080bf612011-04-05 18:46:00 +0000479 break;
480
481 case eContextSupervisorCall:
Greg Clayton75906e42011-05-11 18:39:18 +0000482 strm.PutCString ("supervisor call");
Caroline Tice080bf612011-04-05 18:46:00 +0000483 break;
484
485 case eContextTableBranchReadMemory:
Greg Clayton75906e42011-05-11 18:39:18 +0000486 strm.PutCString ("table branch read memory");
Caroline Tice080bf612011-04-05 18:46:00 +0000487 break;
488
489 case eContextWriteRegisterRandomBits:
Greg Clayton75906e42011-05-11 18:39:18 +0000490 strm.PutCString ("write random bits to a register");
Caroline Tice080bf612011-04-05 18:46:00 +0000491 break;
492
493 case eContextWriteMemoryRandomBits:
Greg Clayton75906e42011-05-11 18:39:18 +0000494 strm.PutCString ("write random bits to a memory address");
Caroline Tice080bf612011-04-05 18:46:00 +0000495 break;
496
Greg Claytonc07d4512011-04-26 23:48:45 +0000497 case eContextArithmetic:
Greg Clayton75906e42011-05-11 18:39:18 +0000498 strm.PutCString ("arithmetic");
Caroline Tice080bf612011-04-05 18:46:00 +0000499 break;
500
501 case eContextReturnFromException:
Greg Clayton75906e42011-05-11 18:39:18 +0000502 strm.PutCString ("return from exception");
Caroline Tice080bf612011-04-05 18:46:00 +0000503 break;
504
505 default:
Greg Clayton75906e42011-05-11 18:39:18 +0000506 strm.PutCString ("unrecognized context.");
Caroline Tice080bf612011-04-05 18:46:00 +0000507 break;
508 }
509
Greg Claytonc07d4512011-04-26 23:48:45 +0000510 switch (info_type)
Caroline Tice080bf612011-04-05 18:46:00 +0000511 {
Greg Claytonc07d4512011-04-26 23:48:45 +0000512 case eInfoTypeRegisterPlusOffset:
Caroline Tice080bf612011-04-05 18:46:00 +0000513 {
Greg Clayton75906e42011-05-11 18:39:18 +0000514 strm.Printf (" (reg_plus_offset = %s%+lld)",
515 info.RegisterPlusOffset.reg.name,
516 info.RegisterPlusOffset.signed_offset);
Caroline Tice080bf612011-04-05 18:46:00 +0000517 }
Greg Claytonc07d4512011-04-26 23:48:45 +0000518 break;
519
520 case eInfoTypeRegisterPlusIndirectOffset:
Caroline Tice080bf612011-04-05 18:46:00 +0000521 {
Greg Clayton75906e42011-05-11 18:39:18 +0000522 strm.Printf (" (reg_plus_reg = %s + %s)",
523 info.RegisterPlusIndirectOffset.base_reg.name,
524 info.RegisterPlusIndirectOffset.offset_reg.name);
Caroline Tice080bf612011-04-05 18:46:00 +0000525 }
Greg Claytonc07d4512011-04-26 23:48:45 +0000526 break;
527
528 case eInfoTypeRegisterToRegisterPlusOffset:
Caroline Tice080bf612011-04-05 18:46:00 +0000529 {
Greg Clayton75906e42011-05-11 18:39:18 +0000530 strm.Printf (" (base_and_imm_offset = %s%+lld, data_reg = %s)",
531 info.RegisterToRegisterPlusOffset.base_reg.name,
532 info.RegisterToRegisterPlusOffset.offset,
533 info.RegisterToRegisterPlusOffset.data_reg.name);
Caroline Tice080bf612011-04-05 18:46:00 +0000534 }
Greg Claytonc07d4512011-04-26 23:48:45 +0000535 break;
536
537 case eInfoTypeRegisterToRegisterPlusIndirectOffset:
Caroline Tice080bf612011-04-05 18:46:00 +0000538 {
Greg Clayton75906e42011-05-11 18:39:18 +0000539 strm.Printf (" (base_and_reg_offset = %s + %s, data_reg = %s)",
540 info.RegisterToRegisterPlusIndirectOffset.base_reg.name,
541 info.RegisterToRegisterPlusIndirectOffset.offset_reg.name,
542 info.RegisterToRegisterPlusIndirectOffset.data_reg.name);
Caroline Tice080bf612011-04-05 18:46:00 +0000543 }
Greg Claytonc07d4512011-04-26 23:48:45 +0000544 break;
545
546 case eInfoTypeRegisterRegisterOperands:
547 {
Greg Clayton75906e42011-05-11 18:39:18 +0000548 strm.Printf (" (register to register binary op: %s and %s)",
549 info.RegisterRegisterOperands.operand1.name,
550 info.RegisterRegisterOperands.operand2.name);
Greg Claytonc07d4512011-04-26 23:48:45 +0000551 }
552 break;
553
554 case eInfoTypeOffset:
Greg Clayton75906e42011-05-11 18:39:18 +0000555 strm.Printf (" (signed_offset = %+lld)", info.signed_offset);
Greg Claytonc07d4512011-04-26 23:48:45 +0000556 break;
Caroline Tice080bf612011-04-05 18:46:00 +0000557
Greg Claytonc07d4512011-04-26 23:48:45 +0000558 case eInfoTypeRegister:
Greg Clayton75906e42011-05-11 18:39:18 +0000559 strm.Printf (" (reg = %s)", info.reg.name);
Greg Claytonc07d4512011-04-26 23:48:45 +0000560 break;
561
562 case eInfoTypeImmediate:
Greg Clayton75906e42011-05-11 18:39:18 +0000563 strm.Printf (" (unsigned_immediate = %llu (0x%16.16llx))",
564 info.unsigned_immediate,
565 info.unsigned_immediate);
Greg Claytonc07d4512011-04-26 23:48:45 +0000566 break;
Caroline Tice080bf612011-04-05 18:46:00 +0000567
Greg Claytonc07d4512011-04-26 23:48:45 +0000568 case eInfoTypeImmediateSigned:
Greg Clayton75906e42011-05-11 18:39:18 +0000569 strm.Printf (" (signed_immediate = %+lld (0x%16.16llx))",
570 info.signed_immediate,
571 info.signed_immediate);
Greg Claytonc07d4512011-04-26 23:48:45 +0000572 break;
573
574 case eInfoTypeAddress:
Greg Clayton75906e42011-05-11 18:39:18 +0000575 strm.Printf (" (address = 0x%llx)", info.address);
Greg Claytonc07d4512011-04-26 23:48:45 +0000576 break;
577
578 case eInfoTypeISAAndImmediate:
Greg Clayton75906e42011-05-11 18:39:18 +0000579 strm.Printf (" (isa = %u, unsigned_immediate = %u (0x%8.8x))",
580 info.ISAAndImmediate.isa,
581 info.ISAAndImmediate.unsigned_data32,
582 info.ISAAndImmediate.unsigned_data32);
Greg Claytonc07d4512011-04-26 23:48:45 +0000583 break;
584
585 case eInfoTypeISAAndImmediateSigned:
Greg Clayton75906e42011-05-11 18:39:18 +0000586 strm.Printf (" (isa = %u, signed_immediate = %i (0x%8.8x))",
587 info.ISAAndImmediateSigned.isa,
588 info.ISAAndImmediateSigned.signed_data32,
589 info.ISAAndImmediateSigned.signed_data32);
Greg Claytonc07d4512011-04-26 23:48:45 +0000590 break;
591
592 case eInfoTypeISA:
Greg Clayton75906e42011-05-11 18:39:18 +0000593 strm.Printf (" (isa = %u)", info.isa);
Greg Claytonc07d4512011-04-26 23:48:45 +0000594 break;
595
596 case eInfoTypeNoArgs:
Greg Claytonc07d4512011-04-26 23:48:45 +0000597 break;
Caroline Tice080bf612011-04-05 18:46:00 +0000598
Greg Claytonc07d4512011-04-26 23:48:45 +0000599 default:
Greg Clayton75906e42011-05-11 18:39:18 +0000600 strm.Printf (" (unknown <info_type>)");
Greg Claytonc07d4512011-04-26 23:48:45 +0000601 break;
Caroline Tice080bf612011-04-05 18:46:00 +0000602 }
603}
604
Greg Clayton888a7332011-04-26 04:39:08 +0000605bool
606EmulateInstruction::SetInstruction (const Opcode &opcode, const Address &inst_addr, Target *target)
Caroline Tice080bf612011-04-05 18:46:00 +0000607{
Greg Clayton888a7332011-04-26 04:39:08 +0000608 m_opcode = opcode;
Greg Clayton3063c952011-04-29 22:50:31 +0000609 m_addr = LLDB_INVALID_ADDRESS;
Greg Clayton888a7332011-04-26 04:39:08 +0000610 if (inst_addr.IsValid())
Caroline Tice080bf612011-04-05 18:46:00 +0000611 {
Greg Clayton888a7332011-04-26 04:39:08 +0000612 if (target)
Greg Clayton3063c952011-04-29 22:50:31 +0000613 m_addr = inst_addr.GetLoadAddress (target);
614 if (m_addr == LLDB_INVALID_ADDRESS)
615 m_addr = inst_addr.GetFileAddress ();
Caroline Tice080bf612011-04-05 18:46:00 +0000616 }
Greg Clayton888a7332011-04-26 04:39:08 +0000617 return true;
Caroline Tice080bf612011-04-05 18:46:00 +0000618}
619
Greg Claytonc07d4512011-04-26 23:48:45 +0000620bool
Greg Clayton061b79d2011-05-09 20:18:18 +0000621EmulateInstruction::GetBestRegisterKindAndNumber (const RegisterInfo *reg_info,
Greg Claytonc07d4512011-04-26 23:48:45 +0000622 uint32_t &reg_kind,
623 uint32_t &reg_num)
Greg Clayton888a7332011-04-26 04:39:08 +0000624{
Greg Claytonc07d4512011-04-26 23:48:45 +0000625 // Generic and DWARF should be the two most popular register kinds when
626 // emulating instructions since they are the most platform agnostic...
Greg Clayton061b79d2011-05-09 20:18:18 +0000627 reg_num = reg_info->kinds[eRegisterKindGeneric];
Greg Claytonc07d4512011-04-26 23:48:45 +0000628 if (reg_num != LLDB_INVALID_REGNUM)
Greg Clayton888a7332011-04-26 04:39:08 +0000629 {
Greg Claytonc07d4512011-04-26 23:48:45 +0000630 reg_kind = eRegisterKindGeneric;
631 return true;
Greg Clayton888a7332011-04-26 04:39:08 +0000632 }
Greg Clayton888a7332011-04-26 04:39:08 +0000633
Greg Clayton061b79d2011-05-09 20:18:18 +0000634 reg_num = reg_info->kinds[eRegisterKindDWARF];
Greg Claytonc07d4512011-04-26 23:48:45 +0000635 if (reg_num != LLDB_INVALID_REGNUM)
Greg Clayton888a7332011-04-26 04:39:08 +0000636 {
Greg Claytonc07d4512011-04-26 23:48:45 +0000637 reg_kind = eRegisterKindDWARF;
638 return true;
639 }
Greg Clayton888a7332011-04-26 04:39:08 +0000640
Greg Clayton061b79d2011-05-09 20:18:18 +0000641 reg_num = reg_info->kinds[eRegisterKindLLDB];
Greg Claytonc07d4512011-04-26 23:48:45 +0000642 if (reg_num != LLDB_INVALID_REGNUM)
643 {
644 reg_kind = eRegisterKindLLDB;
645 return true;
Greg Clayton888a7332011-04-26 04:39:08 +0000646 }
Greg Claytonc07d4512011-04-26 23:48:45 +0000647
Greg Clayton061b79d2011-05-09 20:18:18 +0000648 reg_num = reg_info->kinds[eRegisterKindGCC];
Greg Claytonc07d4512011-04-26 23:48:45 +0000649 if (reg_num != LLDB_INVALID_REGNUM)
650 {
651 reg_kind = eRegisterKindGCC;
652 return true;
653 }
654
Greg Clayton061b79d2011-05-09 20:18:18 +0000655 reg_num = reg_info->kinds[eRegisterKindGDB];
Greg Claytonc07d4512011-04-26 23:48:45 +0000656 if (reg_num != LLDB_INVALID_REGNUM)
657 {
658 reg_kind = eRegisterKindGDB;
659 return true;
660 }
661 return false;
662}
663
664uint32_t
665EmulateInstruction::GetInternalRegisterNumber (RegisterContext *reg_ctx, const RegisterInfo &reg_info)
666{
667 uint32_t reg_kind, reg_num;
Greg Clayton061b79d2011-05-09 20:18:18 +0000668 if (reg_ctx && GetBestRegisterKindAndNumber (&reg_info, reg_kind, reg_num))
Greg Claytonc07d4512011-04-26 23:48:45 +0000669 return reg_ctx->ConvertRegisterKindToRegisterNumber (reg_kind, reg_num);
670 return LLDB_INVALID_REGNUM;
671}
672
673
674bool
675EmulateInstruction::CreateFunctionEntryUnwind (UnwindPlan &unwind_plan)
676{
677 unwind_plan.Clear();
678 return false;
Greg Clayton888a7332011-04-26 04:39:08 +0000679}
680
Caroline Tice080bf612011-04-05 18:46:00 +0000681