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gerrit-public.fairphone.software / platform / external / lldb / 6dc5a1aaee217d49d91f157390b0de06a0f71681 / source / Plugins / Instruction / ARM / EmulateInstructionARM.cpp
  1. 6dc5a1a Bail out if we have an invalid thumb instruction. by Johnny Chen · 13 years ago
  2. 6cc6097 Turn the commented-out assert()'s into appropriate bail-out actions. by Johnny Chen · 13 years ago
  3. a4438a7 When emulating an ill-formed instruction, we should bail out instead of asserting and bringing down the whole process. by Johnny Chen · 13 years ago
  4. e1f47bb Remove asserts that will crash LLDB. These should be changed to return by Greg Clayton · 13 years ago
  5. f5ae76b EmulateShiftReg() also accepts shifter type of SRType_ROR. by Johnny Chen · 13 years ago
  6. 04d397c Fixed an issue in the EmulateInstructionARM there the IT opcode was trying to by Greg Clayton · 13 years ago
  7. b9e8f6e Added a way to resolve an load address from a target: by Greg Clayton · 13 years ago
  8. 75906e4 Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their by Greg Clayton · 13 years ago
  9. 061b79d While implementing unwind information using UnwindAssemblyInstEmulation I ran by Greg Clayton · 13 years ago
  10. 3063c95 Added the start of the CFI row production using the emulate instruction classes. by Greg Clayton · 13 years ago
  11. 57b3c6b Added a new OptionValue subclass for lldb::Format: OptionValueFormat. Added by Greg Clayton · 13 years ago
  12. c07d451 Got the EmulateInstruction CFI code a lot closer to producing CFI data. by Greg Clayton · 13 years ago
  13. 1d29a85 Modify EmulateInstructionARM::SetArchitecture() to treat "arm" and "thumb" as wild card architectures by Johnny Chen · 13 years ago
  14. 888a733 Changed the emulate instruction function to take emulate options which by Greg Clayton · 13 years ago
  15. dfb2e20 by Caroline Tice · 13 years ago
  16. 6b8d3b5 by Caroline Tice · 13 years ago
  17. 55e569e by Caroline Tice · 13 years ago
  18. 523c554 by Caroline Tice · 13 years ago
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  24. 93767b8 by Caroline Tice · 13 years ago
  25. 7b88094 by Caroline Tice · 13 years ago
  26. 1e542e3 by Caroline Tice · 13 years ago
  27. b6281b1 by Caroline Tice · 13 years ago
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  31. bf5a66b by Caroline Tice · 13 years ago
  32. 4f60558 by Caroline Tice · 13 years ago
  33. 74467fe by Caroline Tice · 13 years ago
  34. 24bc5d9 Many improvements to the Platform base class and subclasses. The base Platform by Greg Clayton · 13 years ago
  35. eab301f by Caroline Tice · 13 years ago
  36. 1697dd7 by Caroline Tice · 13 years ago
  37. e98b958 by Caroline Tice · 13 years ago
  38. d42b3cc by Caroline Tice · 13 years ago
  39. ef44000 by Caroline Tice · 13 years ago
  40. 5168b6c by Caroline Tice · 13 years ago
  41. 4cccd53 by Caroline Tice · 13 years ago
  42. c08ed38 by Caroline Tice · 13 years ago
  43. d05b490 by Caroline Tice · 13 years ago
  44. 89c6d58 by Caroline Tice · 13 years ago
  45. bb48f0b Fix single quote characters throughout the ARM emulation stuff. by Caroline Tice · 13 years ago
  46. 7bc3908 Made the lldb_private::Opcode struct into a real boy... I mean class. by Greg Clayton · 13 years ago
  47. b344843 Fixed the LLDB build so that we can have private types, private enums and by Greg Clayton · 13 years ago
  48. baf1f64 by Caroline Tice · 13 years ago
  49. e221288 by Caroline Tice · 13 years ago
  50. 4fdf760 Split all of the core of LLDB.framework/lldb.so into a by Greg Clayton · 13 years ago
  51. 3e40797 by Caroline Tice · 13 years ago
  52. 8d681f5 by Caroline Tice · 13 years ago
  53. 8ce836d by Caroline Tice · 13 years ago
  54. 2b03ed8 by Caroline Tice · 13 years ago
  55. b27771d by Caroline Tice · 13 years ago
  56. 11555f2 by Caroline Tice · 13 years ago
  57. 8ce96d9 by Caroline Tice · 13 years ago
  58. 868198b by Caroline Tice · 13 years ago
  59. 6bf6516 by Caroline Tice · 13 years ago
  60. 40b1a6c by Caroline Tice · 13 years ago
  61. dcc11b3 by Caroline Tice · 13 years ago
  62. 5c1e2ed by Caroline Tice · 13 years ago
  63. 291a3e9 by Caroline Tice · 13 years ago
  64. d2fac09 by Caroline Tice · 13 years ago
  65. 78fb563 by Caroline Tice · 13 years ago
  66. 672f311 by Caroline Tice · 13 years ago
  67. 5f59391 by Caroline Tice · 13 years ago
  68. a5e28af by Caroline Tice · 13 years ago
  69. 0e6bc95 by Caroline Tice · 13 years ago
  70. 952b538 by Caroline Tice · 13 years ago
  71. 0491b3b by Caroline Tice · 13 years ago
  72. 01d6157 Add emulation for Encoding A1 of A8.6.97 MOV (register). by Johnny Chen · 14 years ago
  73. 696b4ef Fix typos in the opcode entries for branch instructions. by Johnny Chen · 14 years ago
  74. 59e6ab7 Add emulation for BXJ (Branch and Exchange Jazelle), assuming that the attempt to by Johnny Chen · 14 years ago
  75. b9f02cf Add emulation methods for Bitwise Bit Clear (immediate and register) operations. by Johnny Chen · 14 years ago
  76. 15a7a6b Add emulation methods for "SUB (immediate, Thumb)" and "SUB (immediate, ARM)" operations. by Johnny Chen · 14 years ago
  77. a695f95 Add emulation for "ADR" operations. Add a ThumbImm8Scaled() convenience function by Johnny Chen · 14 years ago
  78. c9e747f Modify EmulateSUBSPImm() to handle the cases with generic Rd value instead of by Johnny Chen · 14 years ago
  79. 9b38177 Add emulation methods for "SBC (immediate)" and "SBC (register)" operations. by Johnny Chen · 14 years ago
  80. 940b103 Abtracted all mach-o and ELF out of ArchSpec. This patch is a modified form by Greg Clayton · 14 years ago
  81. 2434884 Renamed macro definition of CPSR_C to be CPSR_C_POS to avoid confusions and subtle bugs. by Johnny Chen · 14 years ago
  82. 90e607b Add emulation methods for "RSC (immediate)" and "RSC (register)" operations. by Johnny Chen · 14 years ago
  83. ed32e7c Add emulation methods for "RSB (immediate)" and "RSB (register)". by Johnny Chen · 14 years ago
  84. 3dd0605 Add two convenience functions: DecodeImmShiftThumb() and DecodeImmShiftARM() to ARMUtils.h. by Johnny Chen · 14 years ago
  85. 078fbc6 Add "cmp<c>.w <Rn>, #<const>" emulation to EmulateCMPImm() method, by Johnny Chen · 14 years ago
  86. 688926f Fix the 'variants' field of "CMN (immediate)" Encoding T1 entry, it should be ARMV6T2_ABOVE, not ARMvAll. by Johnny Chen · 14 years ago
  87. 3847dad Add ARM encoding entries for "CMN (immediate)" and "CMN (register)" operations. by Johnny Chen · 14 years ago
  88. 34075cb Add ARM encoding entries for "CMP (immediate)" and "CMP (register)" operations. by Johnny Chen · 14 years ago
  89. d642a6a Add emulation methods for "MVN (immediate)" and "MVN (register)". by Johnny Chen · 14 years ago
  90. 2115b41 Add emulation methods for "EOR (Immediate)", "EOR (register)", by Johnny Chen · 14 years ago
  91. de3cce3 Add emulation methods for "TST (immediate)" and "TST (register)". by Johnny Chen · 14 years ago
  92. e39f22d Make the helper method ReadCoreReg(uint32_t reg, bool *success) more generic by Johnny Chen · 14 years ago
  93. 30fec12 by Caroline Tice · 14 years ago
  94. 7c5234d Add emulation methods for "ORR (immediate)" and "ORR (register)". by Johnny Chen · 14 years ago
  95. f55261f by Caroline Tice · 14 years ago
  96. 157b959 Add emulation methods for "ADC (immediate)" and "ADC (register)". by Johnny Chen · 14 years ago
  97. 21b604b by Caroline Tice · 14 years ago
  98. e97c0d5 Add emulation methods for "AND (immediate)" and "AND (register)". by Johnny Chen · 14 years ago
  99. fe47911 by Caroline Tice · 14 years ago
  100. e92b27c Fix typo. by Johnny Chen · 14 years ago