1. dfb2e20 by Caroline Tice · 13 years ago
  2. 6b8d3b5 by Caroline Tice · 13 years ago
  3. 55e569e by Caroline Tice · 13 years ago
  4. 523c554 by Caroline Tice · 13 years ago
  5. 1f954f5 by Caroline Tice · 13 years ago
  6. 0fe5a53 by Caroline Tice · 13 years ago
  7. af59180 by Caroline Tice · 13 years ago
  8. 080bf61 by Caroline Tice · 13 years ago
  9. 8d24b4a by Caroline Tice · 13 years ago
  10. 93767b8 by Caroline Tice · 13 years ago
  11. 7b88094 by Caroline Tice · 13 years ago
  12. 1e542e3 by Caroline Tice · 13 years ago
  13. b6281b1 by Caroline Tice · 13 years ago
  14. 9121b35 by Caroline Tice · 13 years ago
  15. 424652f by Caroline Tice · 13 years ago
  16. 917ad35 by Caroline Tice · 13 years ago
  17. bf5a66b by Caroline Tice · 13 years ago
  18. 4f60558 by Caroline Tice · 13 years ago
  19. 74467fe by Caroline Tice · 13 years ago
  20. 24bc5d9 Many improvements to the Platform base class and subclasses. The base Platform by Greg Clayton · 13 years ago
  21. eab301f by Caroline Tice · 13 years ago
  22. 1697dd7 by Caroline Tice · 13 years ago
  23. e98b958 by Caroline Tice · 13 years ago
  24. d42b3cc by Caroline Tice · 13 years ago
  25. ef44000 by Caroline Tice · 13 years ago
  26. 5168b6c by Caroline Tice · 13 years ago
  27. 4cccd53 by Caroline Tice · 13 years ago
  28. c08ed38 by Caroline Tice · 13 years ago
  29. d05b490 by Caroline Tice · 13 years ago
  30. 89c6d58 by Caroline Tice · 13 years ago
  31. bb48f0b Fix single quote characters throughout the ARM emulation stuff. by Caroline Tice · 13 years ago
  32. 7bc3908 Made the lldb_private::Opcode struct into a real boy... I mean class. by Greg Clayton · 13 years ago
  33. b344843 Fixed the LLDB build so that we can have private types, private enums and by Greg Clayton · 13 years ago
  34. baf1f64 by Caroline Tice · 13 years ago
  35. e221288 by Caroline Tice · 13 years ago
  36. 4fdf760 Split all of the core of LLDB.framework/lldb.so into a by Greg Clayton · 13 years ago
  37. 3e40797 by Caroline Tice · 13 years ago
  38. 8d681f5 by Caroline Tice · 13 years ago
  39. 8ce836d by Caroline Tice · 13 years ago
  40. 2b03ed8 by Caroline Tice · 13 years ago
  41. b27771d by Caroline Tice · 13 years ago
  42. 11555f2 by Caroline Tice · 13 years ago
  43. 8ce96d9 by Caroline Tice · 13 years ago
  44. 868198b by Caroline Tice · 13 years ago
  45. 6bf6516 by Caroline Tice · 13 years ago
  46. 40b1a6c by Caroline Tice · 13 years ago
  47. dcc11b3 by Caroline Tice · 13 years ago
  48. 5c1e2ed by Caroline Tice · 13 years ago
  49. 291a3e9 by Caroline Tice · 13 years ago
  50. d2fac09 by Caroline Tice · 13 years ago
  51. 78fb563 by Caroline Tice · 13 years ago
  52. 672f311 by Caroline Tice · 13 years ago
  53. 5f59391 by Caroline Tice · 13 years ago
  54. a5e28af by Caroline Tice · 13 years ago
  55. 0e6bc95 by Caroline Tice · 13 years ago
  56. 952b538 by Caroline Tice · 13 years ago
  57. 0491b3b by Caroline Tice · 13 years ago
  58. 01d6157 Add emulation for Encoding A1 of A8.6.97 MOV (register). by Johnny Chen · 14 years ago
  59. 696b4ef Fix typos in the opcode entries for branch instructions. by Johnny Chen · 14 years ago
  60. 59e6ab7 Add emulation for BXJ (Branch and Exchange Jazelle), assuming that the attempt to by Johnny Chen · 14 years ago
  61. b9f02cf Add emulation methods for Bitwise Bit Clear (immediate and register) operations. by Johnny Chen · 14 years ago
  62. 15a7a6b Add emulation methods for "SUB (immediate, Thumb)" and "SUB (immediate, ARM)" operations. by Johnny Chen · 14 years ago
  63. a695f95 Add emulation for "ADR" operations. Add a ThumbImm8Scaled() convenience function by Johnny Chen · 14 years ago
  64. c9e747f Modify EmulateSUBSPImm() to handle the cases with generic Rd value instead of by Johnny Chen · 14 years ago
  65. 9b38177 Add emulation methods for "SBC (immediate)" and "SBC (register)" operations. by Johnny Chen · 14 years ago
  66. 940b103 Abtracted all mach-o and ELF out of ArchSpec. This patch is a modified form by Greg Clayton · 14 years ago
  67. 2434884 Renamed macro definition of CPSR_C to be CPSR_C_POS to avoid confusions and subtle bugs. by Johnny Chen · 14 years ago
  68. 90e607b Add emulation methods for "RSC (immediate)" and "RSC (register)" operations. by Johnny Chen · 14 years ago
  69. ed32e7c Add emulation methods for "RSB (immediate)" and "RSB (register)". by Johnny Chen · 14 years ago
  70. 3dd0605 Add two convenience functions: DecodeImmShiftThumb() and DecodeImmShiftARM() to ARMUtils.h. by Johnny Chen · 14 years ago
  71. 078fbc6 Add "cmp<c>.w <Rn>, #<const>" emulation to EmulateCMPImm() method, by Johnny Chen · 14 years ago
  72. 688926f Fix the 'variants' field of "CMN (immediate)" Encoding T1 entry, it should be ARMV6T2_ABOVE, not ARMvAll. by Johnny Chen · 14 years ago
  73. 3847dad Add ARM encoding entries for "CMN (immediate)" and "CMN (register)" operations. by Johnny Chen · 14 years ago
  74. 34075cb Add ARM encoding entries for "CMP (immediate)" and "CMP (register)" operations. by Johnny Chen · 14 years ago
  75. d642a6a Add emulation methods for "MVN (immediate)" and "MVN (register)". by Johnny Chen · 14 years ago
  76. 2115b41 Add emulation methods for "EOR (Immediate)", "EOR (register)", by Johnny Chen · 14 years ago
  77. de3cce3 Add emulation methods for "TST (immediate)" and "TST (register)". by Johnny Chen · 14 years ago
  78. e39f22d Make the helper method ReadCoreReg(uint32_t reg, bool *success) more generic by Johnny Chen · 14 years ago
  79. 30fec12 by Caroline Tice · 14 years ago
  80. 7c5234d Add emulation methods for "ORR (immediate)" and "ORR (register)". by Johnny Chen · 14 years ago
  81. f55261f by Caroline Tice · 14 years ago
  82. 157b959 Add emulation methods for "ADC (immediate)" and "ADC (register)". by Johnny Chen · 14 years ago
  83. 21b604b by Caroline Tice · 14 years ago
  84. e97c0d5 Add emulation methods for "AND (immediate)" and "AND (register)". by Johnny Chen · 14 years ago
  85. fe47911 by Caroline Tice · 14 years ago
  86. e92b27c Fix typo. by Johnny Chen · 14 years ago
  87. 8fa2059 Add emulation of Encoding A1 "A8.6.6 ADD (register)" and "A8.6.5 ADD (immediate, ARM)". by Johnny Chen · 14 years ago
  88. 4d729c5 by Caroline Tice · 14 years ago
  89. 864a8e8 Finished renamings to make the emulation method names consistent case-wise. by Johnny Chen · 14 years ago
  90. 9f68772 Some renamings to make the emulation method names consistent case-wise. by Johnny Chen · 14 years ago
  91. 104c8b6 Fix a bug in EmulateTB() (TBB, TBH) where the branch length should be "twice" by Johnny Chen · 14 years ago
  92. 10530c2 Refactoring. Abstracted the set flags operation into its own helper method by Johnny Chen · 14 years ago
  93. d761dcf A8.6.6 ADD (register) by Johnny Chen · 14 years ago
  94. 60299ec Add EmulateTB() method to emulate "Table Branch Byte" and "Table Branch Halfword" by Johnny Chen · 14 years ago
  95. cc96eb5 by Caroline Tice · 14 years ago
  96. 7c677ac Move Align(val, alignment) utility function to ARMUtils.h. by Johnny Chen · 14 years ago
  97. ca67d1c Refactoring. Wrap the following pseudocode from the ARM Architecture Reference Manul: by Johnny Chen · 14 years ago
  98. eeab485 Add emulation methods for ROR (immediate), ROR (register), and RRX. by Johnny Chen · 14 years ago
  99. 73a29de by Caroline Tice · 14 years ago
  100. 2ee35bc Add encoding entries for LSL (immediate and register) and LSR (immediate and register) to by Johnny Chen · 14 years ago