commit 030915850b560c65d0363bb651de29364d45c65b
author Chris Lattner <sabre@nondot.org> Fri Feb 05 19:16:26 2010 +0000
committer Chris Lattner <sabre@nondot.org> Fri Feb 05 19:16:26 2010 +0000
tree c6bff8faee7e6cb096938adb1f004f70c58907d0
parent 4b8fb298b7c24644d06119818ce9ade33d6b6d50

change getSizeOfImm and getBaseOpcodeFor to just take
TSFlags directly instead of a TargetInstrDesc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95405 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstrInfo.cpp

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 76c48c3..087510f 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -3014,16 +3014,6 @@
            RC == &X86::RFP64RegClass || RC == &X86::RFP80RegClass);
 }
 
-unsigned X86InstrInfo::sizeOfImm(const TargetInstrDesc *Desc) {
-  switch (Desc->TSFlags & X86II::ImmMask) {
-  case X86II::Imm8:   return 1;
-  case X86II::Imm16:  return 2;
-  case X86II::Imm32:  return 4;
-  case X86II::Imm64:  return 8;
-  default: llvm_unreachable("Immediate size not set!");
-    return 0;
-  }
-}
 
 /// isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended register?
 /// e.g. r8, xmm8, etc.
@@ -3400,7 +3390,7 @@
     case X86::MOVPC32r: {
       // This emits the "call" portion of this pseudo instruction.
       ++FinalSize;
-      FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+      FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags));
       break;
     }
     }
@@ -3418,7 +3408,7 @@
       } else if (MO.isSymbol()) {
         FinalSize += sizeExternalSymbolAddress(false);
       } else if (MO.isImm()) {
-        FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+        FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags));
       } else {
         llvm_unreachable("Unknown RawFrm operand!");
       }
@@ -3431,7 +3421,7 @@
     
     if (CurOp != NumOps) {
       const MachineOperand &MO1 = MI.getOperand(CurOp++);
-      unsigned Size = X86InstrInfo::sizeOfImm(Desc);
+      unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags);
       if (MO1.isImm())
         FinalSize += sizeConstant(Size);
       else {
@@ -3456,7 +3446,7 @@
     CurOp += 2;
     if (CurOp != NumOps) {
       ++CurOp;
-      FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+      FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags));
     }
     break;
   }
@@ -3466,7 +3456,7 @@
     CurOp +=  X86AddrNumOperands + 1;
     if (CurOp != NumOps) {
       ++CurOp;
-      FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+      FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags));
     }
     break;
   }
@@ -3477,7 +3467,7 @@
     CurOp += 2;
     if (CurOp != NumOps) {
       ++CurOp;
-      FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+      FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags));
     }
     break;
 
@@ -3494,7 +3484,7 @@
     CurOp += AddrOperands + 1;
     if (CurOp != NumOps) {
       ++CurOp;
-      FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+      FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags));
     }
     break;
   }
@@ -3519,7 +3509,7 @@
 
     if (CurOp != NumOps) {
       const MachineOperand &MO1 = MI.getOperand(CurOp++);
-      unsigned Size = X86InstrInfo::sizeOfImm(Desc);
+      unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags);
       if (MO1.isImm())
         FinalSize += sizeConstant(Size);
       else {
@@ -3549,7 +3539,7 @@
 
     if (CurOp != NumOps) {
       const MachineOperand &MO = MI.getOperand(CurOp++);
-      unsigned Size = X86InstrInfo::sizeOfImm(Desc);
+      unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags);
       if (MO.isImm())
         FinalSize += sizeConstant(Size);
       else {