| commit | 04c7877894492d6e8aa45567988cd7de100589d8 | [log] [tgz] |
|---|---|---|
| author | Owen Anderson <resistor@mac.com> | Mon Sep 19 22:34:23 2011 +0000 |
| committer | Owen Anderson <resistor@mac.com> | Mon Sep 19 22:34:23 2011 +0000 |
| tree | ffac4b172066bb1f2ee6e8d760fb34edc306993a | |
| parent | 7f739bee261debdf56bd89ac922b57eca53e91dc [diff] [blame] |
Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, not in the middle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140079 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index dea38bf..5fd641d 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -454,6 +454,8 @@ break; case ARM::tB: case ARM::t2B: + case ARM::t2TBB: + case ARM::t2TBH: // Some instructions (mostly unconditional branches) can // only appears at the end of, or outside of, an IT. if (ITBlock.size() > 1)