commit 04ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1
author Evan Cheng <evan.cheng@apple.com> Tue Jan 20 19:12:24 2009 +0000
committer Evan Cheng <evan.cheng@apple.com> Tue Jan 20 19:12:24 2009 +0000
tree 83e8495f021a9e995df02cb9df4ed332e369e336
parent a913f4fca947c195a675e04ba625fe9e67d1a865

Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCInstrInfo.cpp

diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index e2faf40..f0eabde 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -42,7 +42,11 @@
 
 bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI,
                                unsigned& sourceReg,
-                               unsigned& destReg) const {
+                               unsigned& destReg,
+                               unsigned& sourceSubIdx,
+                               unsigned& destSubIdx) const {
+  sourceSubIdx = destSubIdx = 0; // No sub-registers.
+
   unsigned oc = MI.getOpcode();
   if (oc == PPC::OR || oc == PPC::OR8 || oc == PPC::VOR ||
       oc == PPC::OR4To8 || oc == PPC::OR8To4) {                // or r1, r2, r2