commit 06b766d1c0ff7373e911fe5f8c42f62aa2f67e92
author Sean Callanan <scallanan@apple.com> Tue Dec 22 02:07:42 2009 +0000
committer Sean Callanan <scallanan@apple.com> Tue Dec 22 02:07:42 2009 +0000
tree 1b6324c40ba358d19c13f4b904efdd793f551c56
parent baf2e35e1862aaaec1fb94e0a24bbb3c8ea2819d

Changed REG_* to MODRM_REG_* to avoid conflicts
with symbols in AuroraUX's global namespace.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91879 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/Disassembler/X86DisassemblerDecoder.c

diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
index b757fce..bbd0b26 100644
--- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
+++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
@@ -876,15 +876,15 @@
    */
   switch (insn->registerSize) {
   case 2:
-    insn->regBase = REG_AX;
+    insn->regBase = MODRM_REG_AX;
     insn->eaRegBase = EA_REG_AX;
     break;
   case 4:
-    insn->regBase = REG_EAX;
+    insn->regBase = MODRM_REG_EAX;
     insn->eaRegBase = EA_REG_EAX;
     break;
   case 8:
-    insn->regBase = REG_RAX;
+    insn->regBase = MODRM_REG_RAX;
     insn->eaRegBase = EA_REG_RAX;
     break;
   }
@@ -1051,7 +1051,7 @@
  * @param valid - The address of a uint8_t.  The target is set to 1 if the
  *                field is valid for the register class; 0 if not.
  */
-GENERIC_FIXUP_FUNC(fixupRegValue, insn->regBase,    REG)
+GENERIC_FIXUP_FUNC(fixupRegValue, insn->regBase,    MODRM_REG)
 GENERIC_FIXUP_FUNC(fixupRMValue,  insn->eaRegBase,  EA_REG)
 
 /*
@@ -1145,26 +1145,30 @@
   
   switch (size) {
   case 1:
-    insn->opcodeRegister = (Reg)(REG_AL + ((bFromREX(insn->rexPrefix) << 3) 
-                                           | insn->opcodeModifier));
+    insn->opcodeRegister = (Reg)(MODRM_REG_AL + ((bFromREX(insn->rexPrefix) << 3) 
+                                                  | insn->opcodeModifier));
     if(insn->rexPrefix && 
-       insn->opcodeRegister >= REG_AL + 0x4 &&
-       insn->opcodeRegister < REG_AL + 0x8) {
-      insn->opcodeRegister = (Reg)(REG_SPL + (insn->opcodeRegister - REG_AL - 4));
+       insn->opcodeRegister >= MODRM_REG_AL + 0x4 &&
+       insn->opcodeRegister < MODRM_REG_AL + 0x8) {
+      insn->opcodeRegister = (Reg)(MODRM_REG_SPL
+                                   + (insn->opcodeRegister - MODRM_REG_AL - 4));
     }
       
     break;
   case 2:
-    insn->opcodeRegister = (Reg)(REG_AX + ((bFromREX(insn->rexPrefix) << 3) 
-                                            | insn->opcodeModifier));
+    insn->opcodeRegister = (Reg)(MODRM_REG_AX
+                                 + ((bFromREX(insn->rexPrefix) << 3) 
+                                    | insn->opcodeModifier));
     break;
   case 4:
-    insn->opcodeRegister = (Reg)(REG_EAX + ((bFromREX(insn->rexPrefix) << 3) 
-                                             | insn->opcodeModifier));
+    insn->opcodeRegister = (Reg)(MODRM_REG_EAX +
+                                 + ((bFromREX(insn->rexPrefix) << 3) 
+                                    | insn->opcodeModifier));
     break;
   case 8:
-    insn->opcodeRegister = (Reg)(REG_RAX + ((bFromREX(insn->rexPrefix) << 3) 
-                                             |insn->opcodeModifier));
+    insn->opcodeRegister = (Reg)(MODRM_REG_RAX 
+                                 + ((bFromREX(insn->rexPrefix) << 3) 
+                                    | insn->opcodeModifier));
     break;
   }
 }

lib/Target/X86/Disassembler/X86DisassemblerDecoder.h

diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
index f548c65..b7f4b2b 100644
--- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
+++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
@@ -324,10 +324,10 @@
  * Reg - All possible values of the reg field in the ModR/M byte.
  */
 typedef enum {
-#define ENTRY(x) REG_##x,
+#define ENTRY(x) MODRM_REG_##x,
   ALL_REGS
 #undef ENTRY
-  REG_max
+  MODRM_REG_max
 } Reg;
   
 /*