commit 08d52071bae2f8cc2e9aa6a451118b83d043813b
author Christopher Lamb <christopher.lamb@gmail.com> Thu Jul 26 07:48:21 2007 +0000
committer Christopher Lamb <christopher.lamb@gmail.com> Thu Jul 26 07:48:21 2007 +0000
tree 7467f6e03f13c84aad5031e90ba99b9a60f1c622
parent 518143d7950fb02683b9675e94d42c112ed599c4

Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40518 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/InstrInfoEmitter.cpp

diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index da2308e9e..9a5dd2b 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -325,7 +325,9 @@
     // This isn't an error if this is a builtin instruction.
     if (R->getName() != "PHI" &&
         R->getName() != "INLINEASM" &&
-        R->getName() != "LABEL")
+        R->getName() != "LABEL" &&
+        R->getName() != "EXTRACT_SUBREG" &&
+        R->getName() != "INSERT_SUBREG")
       throw R->getName() + " doesn't have a field named '" + 
             Val->getValue() + "'!";
     return;