| commit | 10348e70d567fb61f6c762d99e91e215c720ebd1 | [log] [tgz] |
|---|---|---|
| author | Jim Grosbach <grosbach@apple.com> | Thu Aug 11 20:04:56 2011 +0000 |
| committer | Jim Grosbach <grosbach@apple.com> | Thu Aug 11 20:04:56 2011 +0000 |
| tree | c79e40fafa2d2964c762f72a2a82b4b10edb4ce1 | |
| parent | 961afdf1b641cfa9ed66a6705046393e1dea8847 [diff] [blame] |
ARM STRBT assembly parsing and encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137337 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 85e48c7..d599422 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -939,8 +939,8 @@ case ARM::STR_POST_REG: case ARM::STRTr: case ARM::STRTi: - case ARM::STRBTr: - case ARM::STRBTi: + case ARM::STRBT_POST_REG: + case ARM::STRBT_POST_IMM: if (!DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)) return false; break; default: