Unbreak the stuff, this is ugly, but we cannot do better for now with 'plain' C calling conv.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78232 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 61a08db..252d920 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1460,13 +1460,12 @@
} else {
TargetRegisterClass *RC;
- bool IsHardFloatCC = (CallConv == CallingConv::ARM_AAPCS_VFP);
- if (IsHardFloatCC && RegVT == MVT::f32)
+ if (FloatABIType == FloatABI::Hard && RegVT == MVT::f32)
RC = ARM::SPRRegisterClass;
- else if (IsHardFloatCC && RegVT == MVT::f64)
+ else if (FloatABIType == FloatABI::Hard && RegVT == MVT::f64)
RC = ARM::DPRRegisterClass;
- else if (IsHardFloatCC && RegVT == MVT::v2f64)
+ else if (FloatABIType == FloatABI::Hard && RegVT == MVT::v2f64)
RC = ARM::QPRRegisterClass;
else if (AFI->isThumb1OnlyFunction())
RC = ARM::tGPRRegisterClass;
@@ -1474,7 +1473,7 @@
RC = ARM::GPRRegisterClass;
assert((RegVT == MVT::i32 || RegVT == MVT::f32 ||
- (IsHardFloatCC &&
+ (FloatABIType == FloatABI::Hard &&
((RegVT == MVT::f64) || (RegVT == MVT::v2f64)))) &&
"RegVT not supported by FORMAL_ARGUMENTS Lowering");