Add support for icache invalidation on non-darwin ppc systems.
Patch by Gary Benson!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52332 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCJITInfo.cpp b/lib/Target/PowerPC/PPCJITInfo.cpp
index cbc7353..db36881 100644
--- a/lib/Target/PowerPC/PPCJITInfo.cpp
+++ b/lib/Target/PowerPC/PPCJITInfo.cpp
@@ -333,9 +333,26 @@
/// SyncICache - On PPC, the JIT emitted code must be explicitly refetched to
/// ensure correct execution.
static void SyncICache(const void *Addr, size_t len) {
-#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
-defined(__APPLE__)
+#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
+
+#ifdef __APPLE__
sys_icache_invalidate(Addr, len);
+#elif defined(__GNUC__)
+ const size_t LineSize = 32;
+
+ const intptr_t Mask = ~(LineSize - 1);
+ const intptr_t StartLine = ((intptr_t) Addr) & Mask;
+ const intptr_t EndLine = ((intptr_t) Addr + len + LineSize - 1) & Mask;
+
+ for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
+ asm volatile("dcbf 0, %0" : : "r"(Line));
+ asm volatile("sync");
+
+ for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
+ asm volatile("icbi 0, %0" : : "r"(Line));
+ asm volatile("isync");
+#endif
+
#endif
}