Don't forget about sub-register indices when rematting instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49830 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index dcba66f..280809d 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -831,6 +831,14 @@
MachineBasicBlock::iterator I,
unsigned DestReg,
const MachineInstr *Orig) const {
+ unsigned SubIdx = Orig->getOperand(0).isReg()
+ ? Orig->getOperand(0).getSubReg() : 0;
+ bool ChangeSubIdx = SubIdx != 0;
+ if (SubIdx && TargetRegisterInfo::isPhysicalRegister(DestReg)) {
+ DestReg = RI.getSubReg(DestReg, SubIdx);
+ SubIdx = 0;
+ }
+
// MOV32r0 etc. are implemented with xor which clobbers condition code.
// Re-materialize them as movri instructions to avoid side effects.
switch (Orig->getOpcode()) {
@@ -853,6 +861,11 @@
break;
}
}
+
+ if (ChangeSubIdx) {
+ MachineInstr *NewMI = prior(I);
+ NewMI->getOperand(0).setSubReg(SubIdx);
+ }
}
/// isInvariantLoad - Return true if the specified instruction (which is marked