commit | 1fb6673bc2f0a404f4f914bf381c627402ac7c6b | [log] [tgz] |
---|---|---|
author | Owen Anderson <resistor@mac.com> | Thu Aug 11 22:05:38 2011 +0000 |
committer | Owen Anderson <resistor@mac.com> | Thu Aug 11 22:05:38 2011 +0000 |
tree | ec8ab5497018f89ccc155e5ec79c9593c5eb7923 | |
parent | dd32ba337aab88c215108ca8bf4a0267fce1e773 [diff] [blame] |
Add missing predicate operand on SMLA and friends. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137368 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index e4d7393..b5adc49 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -1260,6 +1260,8 @@ !DecodeGPRnopcRegisterClass(Inst, Ra, Address, Decoder)) return false; + if (!DecodePredicateOperand(Inst, pred, Address, Decoder)) return false; + return true; }