commit 2045c47affc0d1462a815175e420f9d6bd3f35c6
author Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Thu Nov 19 06:06:13 2009 +0000
committer Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Thu Nov 19 06:06:13 2009 +0000
tree dcb1c5e562f2e6e8fa390d5f80c4fdfa69bef80c
parent 0046de0550f781b7739ffd5a6fe138cb306a1cf4

- Add sugregister logic to handle f64=(f32,f32).
- Support mips1 like load/store of doubles:

Instead of:
  sdc $f0, X($3)
Generate:
  swc $f0, X($3)
  swc $f1, X+4($3)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89322 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp

diff --git a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
index 4898fae..efd3fb7 100644
--- a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
+++ b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
@@ -365,6 +365,8 @@
     case MachineOperand::MO_ConstantPoolIndex:
       O << MAI->getPrivateGlobalPrefix() << "CPI"
         << getFunctionNumber() << "_" << MO.getIndex();
+      if (MO.getOffset())
+        O << "+" << MO.getOffset();
       break;
   
     default: