commit 2420b558de5d291d8503c1339004e5b5bf99a48a
author Jakob Stoklund Olesen <stoklund@2pi.dk> Fri Feb 17 19:23:15 2012 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Fri Feb 17 19:23:15 2012 +0000
tree 90983791e41c71c8709d9bf8aec4fa5f6419712c
parent fc0d7400bc44b52d0446933290dfeef2f9586293

Handle regmask operands in ARMInstrInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150833 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/Thumb2InstrInfo.cpp

diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp
index 7ec3c0e..dcf5308 100644
--- a/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -586,7 +586,7 @@
     ARMCC::CondCodes NCC = llvm::getInstrPredicate(NMI, PredReg);
     if (!(NCC == CC || NCC == OCC) ||
         NMI->modifiesRegister(SrcReg, &TRI) ||
-        NMI->definesRegister(ARM::CPSR))
+        NMI->modifiesRegister(ARM::CPSR, &TRI))
       break;
     if (++NumInsts == 4)
       // Too many in a row!