If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on
them. The DAG combiner expects that nodes that are transformed have one value
result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 9cc8061..7e78923 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -966,6 +966,11 @@
SDValue FoldedVOp = SimplifyVBinOp(N);
if (FoldedVOp.getNode()) return FoldedVOp;
}
+
+ if (N->getNumValues() != 1)
+ // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+ // operators.
+ return SDValue();
// fold (add x, undef) -> undef
if (N0.getOpcode() == ISD::UNDEF)
@@ -1161,6 +1166,11 @@
SDValue FoldedVOp = SimplifyVBinOp(N);
if (FoldedVOp.getNode()) return FoldedVOp;
}
+
+ if (N->getNumValues() != 1)
+ // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+ // operators.
+ return SDValue();
// fold (sub x, x) -> 0
if (N0 == N1)
@@ -1220,6 +1230,11 @@
if (FoldedVOp.getNode()) return FoldedVOp;
}
+ if (N->getNumValues() != 1)
+ // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+ // operators.
+ return SDValue();
+
// fold (mul x, undef) -> 0
if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
return DAG.getConstant(0, VT);