diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index b07fb64..b5f2e12 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -113,6 +113,7 @@
   } Kind;
 
   SMLoc StartLoc, EndLoc;
+  SmallVector<unsigned, 8> Registers;
 
   union {
     struct {
@@ -130,10 +131,6 @@
     } Reg;
 
     struct {
-      SmallVector<unsigned, 32> *Registers;
-    } RegList;
-
-    struct {
       const MCExpr *Val;
     } Imm;
 
@@ -172,7 +169,7 @@
     case RegisterList:
     case DPRRegisterList:
     case SPRRegisterList:
-      RegList = o.RegList;
+      Registers = o.Registers;
       break;
     case Immediate:
       Imm = o.Imm;
@@ -182,10 +179,6 @@
       break;
     }
   }
-  ~ARMOperand() {
-    if (isRegList())
-      delete RegList.Registers;
-  }
 
   /// getStartLoc - Get the location of the first token of this operand.
   SMLoc getStartLoc() const { return StartLoc; }
@@ -210,7 +203,7 @@
   const SmallVectorImpl<unsigned> &getRegList() const {
     assert((Kind == RegisterList || Kind == DPRRegisterList ||
             Kind == SPRRegisterList) && "Invalid access!");
-    return *RegList.Registers;
+    return Registers;
   }
 
   const MCExpr *getImm() const {
@@ -350,11 +343,10 @@
       Kind = SPRRegisterList;
 
     ARMOperand *Op = new ARMOperand(Kind);
-    Op->RegList.Registers = new SmallVector<unsigned, 32>();
     for (SmallVectorImpl<std::pair<unsigned, SMLoc> >::const_iterator
            I = Regs.begin(), E = Regs.end(); I != E; ++I)
-      Op->RegList.Registers->push_back(I->first);
-    std::sort(Op->RegList.Registers->begin(), Op->RegList.Registers->end());
+      Op->Registers.push_back(I->first);
+    std::sort(Op->Registers.begin(), Op->Registers.end());
     Op->StartLoc = StartLoc;
     Op->EndLoc = EndLoc;
     return Op;