Fix physical register liveness calculations:
+ Take account of clobbers
+ Give outputs priority over inputs since they happen later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168360 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp
index 18d021d..4406c89 100644
--- a/lib/CodeGen/MachineBasicBlock.cpp
+++ b/lib/CodeGen/MachineBasicBlock.cpp
@@ -982,7 +982,6 @@
MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
unsigned Reg, MachineInstr *MI,
unsigned Neighborhood) {
-
unsigned N = Neighborhood;
MachineBasicBlock *MBB = MI->getParent();
@@ -997,14 +996,18 @@
MachineOperandIteratorBase::PhysRegInfo Analysis =
MIOperands(I).analyzePhysReg(Reg, TRI);
- if (Analysis.Kills)
+ if (Analysis.Defines)
+ // Outputs happen after inputs so they take precedence if both are
+ // present.
+ return Analysis.DefinesDead ? LQR_Dead : LQR_Live;
+
+ if (Analysis.Kills || Analysis.Clobbers)
// Register killed, so isn't live.
return LQR_Dead;
- else if (Analysis.DefinesOverlap || Analysis.ReadsOverlap)
+ else if (Analysis.ReadsOverlap)
// Defined or read without a previous kill - live.
- return (Analysis.Defines || Analysis.Reads) ?
- LQR_Live : LQR_OverlappingLive;
+ return Analysis.Reads ? LQR_Live : LQR_OverlappingLive;
} while (I != MBB->begin() && --N > 0);
}
@@ -1036,7 +1039,7 @@
return (Analysis.Reads) ?
LQR_Live : LQR_OverlappingLive;
- else if (Analysis.DefinesOverlap)
+ else if (Analysis.Clobbers || Analysis.Defines)
// Defined (but not read) therefore cannot have been live.
return LQR_Dead;
}