initial implementation of addressing mode 5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31002 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp
index 8a0f113..f67f39a 100644
--- a/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -55,6 +55,7 @@
}
void printAddrMode1(const MachineInstr *MI, int opNum);
+ void printAddrMode5(const MachineInstr *MI, int opNum);
void printMemRegImm(const MachineInstr *MI, int opNum,
const char *Modifier = NULL) {
@@ -193,6 +194,24 @@
}
}
+void ARMAsmPrinter::printAddrMode5(const MachineInstr *MI, int opNum) {
+ const MachineOperand &Arg = MI->getOperand(opNum);
+ const MachineOperand &Offset = MI->getOperand(opNum + 1);
+ assert(Offset.isImmediate());
+
+ if (Arg.isConstantPoolIndex()) {
+ assert(Offset.getImmedValue() == 0);
+ printOperand(MI, opNum);
+ } else {
+ assert(Arg.isRegister());
+ O << '[';
+ printOperand(MI, opNum);
+ O << ", ";
+ printOperand(MI, opNum + 1);
+ O << ']';
+ }
+}
+
void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
const MachineOperand &MO = MI->getOperand (opNum);
const MRegisterInfo &RI = *TM.getRegisterInfo();