| commit | 342ebd5f380637d965504dcc350f9d0d79bbe599 | [log] [tgz] |
|---|---|---|
| author | Jim Grosbach <grosbach@apple.com> | Thu Aug 11 22:18:00 2011 +0000 |
| committer | Jim Grosbach <grosbach@apple.com> | Thu Aug 11 22:18:00 2011 +0000 |
| tree | e5f9dc68a464f6a086a0285e618744082d821015 | |
| parent | 41ff834e91a7f56dab18fbd7cdc03895197a923f [diff] [blame] |
ARM STRT assembly parsing and encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137372 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 240293a..201ccf8 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -945,8 +945,8 @@ case ARM::STR_POST_REG: case ARM::STRB_POST_IMM: case ARM::STRB_POST_REG: - case ARM::STRTr: - case ARM::STRTi: + case ARM::STRT_POST_REG: + case ARM::STRT_POST_IMM: case ARM::STRBT_POST_REG: case ARM::STRBT_POST_IMM: if (!DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)) return false;