commit 35f2bbe8c644f3c1efbbeb61d2da3695a34aa87b
author Chris Lattner <sabre@nondot.org> Tue Nov 30 06:40:04 2004 +0000
committer Chris Lattner <sabre@nondot.org> Tue Nov 30 06:40:04 2004 +0000
tree 802a494bbc4aa9ebee2ae8b9be8920d6b07bf9d7
parent aac2d44bc344d99beac5c5e05d9f780d7ad0542e

Fix CodeGen/PowerPC/2004-11-30-shr-var-crash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18376 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPC32ISelSimple.cpp

diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 7b9a312..1314087b 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -2870,7 +2870,7 @@
           //   Select correct least significant half if the shift amount > 32
           BB = TmpMBB;
           unsigned OrReg = makeAnotherReg(Type::IntTy);
-          BuildMI(BB, PPC::OR, 2, OrReg).addReg(TmpReg6).addImm(TmpReg6);
+          BuildMI(BB, PPC::OR, 2, OrReg).addReg(TmpReg6).addReg(TmpReg6);
           TmpMBB->addSuccessor(PhiMBB);
           
           BB = PhiMBB;