Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
diff --git a/lib/CodeGen/LiveRangeCalc.cpp b/lib/CodeGen/LiveRangeCalc.cpp
index ae086bc..ecd75b4 100644
--- a/lib/CodeGen/LiveRangeCalc.cpp
+++ b/lib/CodeGen/LiveRangeCalc.cpp
@@ -41,9 +41,8 @@
// Visit all def operands. If the same instruction has multiple defs of Reg,
// LR.createDeadDef() will deduplicate.
- for (MachineRegisterInfo::def_iterator
- I = MRI->def_begin(Reg), E = MRI->def_end(); I != E; ++I) {
- const MachineInstr *MI = &*I;
+ for (MachineOperand &MO : MRI->def_operands(Reg)) {
+ const MachineInstr *MI = MO.getParent();
// Find the corresponding slot index.
SlotIndex Idx;
if (MI->isPHI())
@@ -52,7 +51,7 @@
else
// Instructions are either normal 'r', or early clobber 'e'.
Idx = Indexes->getInstructionIndex(MI)
- .getRegSlot(I.getOperand().isEarlyClobber());
+ .getRegSlot(MO.isEarlyClobber());
// Create the def in LR. This may find an existing def.
LR.createDeadDef(Idx, *Alloc);
@@ -64,9 +63,7 @@
assert(MRI && Indexes && "call reset() first");
// Visit all operands that read Reg. This may include partial defs.
- for (MachineRegisterInfo::reg_nodbg_iterator I = MRI->reg_nodbg_begin(Reg),
- E = MRI->reg_nodbg_end(); I != E; ++I) {
- MachineOperand &MO = I.getOperand();
+ for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
// Clear all kill flags. They will be reinserted after register allocation
// by LiveIntervalAnalysis::addKillFlags().
if (MO.isUse())
@@ -75,7 +72,8 @@
continue;
// MI is reading Reg. We may have visited MI before if it happens to be
// reading Reg multiple times. That is OK, extend() is idempotent.
- const MachineInstr *MI = &*I;
+ const MachineInstr *MI = MO.getParent();
+ unsigned OpNo = (&MO - &MI->getOperand(0));
// Find the SlotIndex being read.
SlotIndex Idx;
@@ -83,7 +81,7 @@
assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
// PHI operands are paired: (Reg, PredMBB).
// Extend the live range to be live-out from PredMBB.
- Idx = Indexes->getMBBEndIdx(MI->getOperand(I.getOperandNo()+1).getMBB());
+ Idx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
} else {
// This is a normal instruction.
Idx = Indexes->getInstructionIndex(MI).getRegSlot();
@@ -92,7 +90,7 @@
if (MO.isDef()) {
if (MO.isEarlyClobber())
Idx = Idx.getRegSlot(true);
- } else if (MI->isRegTiedToDefOperand(I.getOperandNo(), &DefIdx)) {
+ } else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
// FIXME: This would be a lot easier if tied early-clobber uses also
// had an early-clobber flag.
if (MI->getOperand(DefIdx).isEarlyClobber())
@@ -114,7 +112,7 @@
MachineBasicBlock *MBB = I->DomNode->getBlock();
assert(I->Value && "No live-in value found");
SlotIndex Start, End;
- tie(Start, End) = Indexes->getMBBRange(MBB);
+ std::tie(Start, End) = Indexes->getMBBRange(MBB);
if (I->Kill.isValid())
// Value is killed inside this block.
@@ -212,7 +210,7 @@
}
SlotIndex Start, End;
- tie(Start, End) = Indexes->getMBBRange(Pred);
+ std::tie(Start, End) = Indexes->getMBBRange(Pred);
// First time we see Pred. Try to determine the live-out value, but set
// it as null if Pred is live-through with an unknown value.
@@ -247,7 +245,7 @@
for (SmallVectorImpl<unsigned>::const_iterator I = WorkList.begin(),
E = WorkList.end(); I != E; ++I) {
SlotIndex Start, End;
- tie(Start, End) = Indexes->getMBBRange(*I);
+ std::tie(Start, End) = Indexes->getMBBRange(*I);
// Trim the live range in KillMBB.
if (*I == KillMBBNum && Kill.isValid())
End = Kill;
@@ -342,7 +340,7 @@
++Changes;
assert(Alloc && "Need VNInfo allocator to create PHI-defs");
SlotIndex Start, End;
- tie(Start, End) = Indexes->getMBBRange(MBB);
+ std::tie(Start, End) = Indexes->getMBBRange(MBB);
LiveRange &LR = I->LR;
VNInfo *VNI = LR.getNextValue(Start, *Alloc);
I->Value = VNI;