my work on adding segment registers to LEA missed the
disassembler. Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108226 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp
index 8a5a630..09f1584 100644
--- a/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -252,13 +252,8 @@
/// @param mcInst - The MCInst to append to.
/// @param insn - The instruction to extract Mod, R/M, and SIB fields
/// from.
-/// @param sr - Whether or not to emit the segment register. The
-/// LEA instruction does not expect a segment-register
-/// operand.
/// @return - 0 on success; nonzero otherwise
-static bool translateRMMemory(MCInst &mcInst,
- InternalInstruction &insn,
- bool sr) {
+static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn) {
// Addresses in an MCInst are represented as five operands:
// 1. basereg (register) The R/M base, or (if there is a SIB) the
// SIB base
@@ -385,10 +380,7 @@
mcInst.addOperand(scaleAmount);
mcInst.addOperand(indexReg);
mcInst.addOperand(displacement);
-
- if (sr)
- mcInst.addOperand(segmentReg);
-
+ mcInst.addOperand(segmentReg);
return false;
}
@@ -439,9 +431,8 @@
case TYPE_M1616:
case TYPE_M1632:
case TYPE_M1664:
- return translateRMMemory(mcInst, insn, true);
case TYPE_LEA:
- return translateRMMemory(mcInst, insn, false);
+ return translateRMMemory(mcInst, insn);
}
}