Thumb assembly parsing and encoding for LDRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138060 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index d04b9b7..60f16f8 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -628,6 +628,15 @@
int64_t Val = Mem.OffsetImm->getValue();
return Val >= 0 && Val <= 124 && (Val % 4) == 0;
}
+ bool isMemThumbRIs2() const {
+ if (Kind != Memory || Mem.OffsetRegNum != 0 ||
+ !isARMLowRegister(Mem.BaseRegNum))
+ return false;
+ // Immediate offset, multiple of 4 in range [0, 62].
+ if (!Mem.OffsetImm) return true;
+ int64_t Val = Mem.OffsetImm->getValue();
+ return Val >= 0 && Val <= 62 && (Val % 2) == 0;
+ }
bool isMemThumbRIs1() const {
if (Kind != Memory || Mem.OffsetRegNum != 0 ||
!isARMLowRegister(Mem.BaseRegNum))
@@ -1009,6 +1018,13 @@
Inst.addOperand(MCOperand::CreateImm(Val));
}
+ void addMemThumbRIs2Operands(MCInst &Inst, unsigned N) const {
+ assert(N == 2 && "Invalid number of operands!");
+ int64_t Val = Mem.OffsetImm ? (Mem.OffsetImm->getValue() / 2) : 0;
+ Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum));
+ Inst.addOperand(MCOperand::CreateImm(Val));
+ }
+
void addMemThumbRIs1Operands(MCInst &Inst, unsigned N) const {
assert(N == 2 && "Invalid number of operands!");
int64_t Val = Mem.OffsetImm ? (Mem.OffsetImm->getValue()) : 0;