diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h
index bfac1a8..b8fc17d 100644
--- a/include/llvm/Target/MRegisterInfo.h
+++ b/include/llvm/Target/MRegisterInfo.h
@@ -253,15 +253,16 @@
                            const TargetRegisterClass *RC) const = 0;
 
 
-  /// foldMemoryOperand - If this target supports it, fold a load or store of
-  /// the specified stack slot into the specified machine instruction for the
-  /// specified operand.  If this is possible, the target should perform the
-  /// folding and return true, otherwise it should return false.  If it folds
-  /// the instruction, it is likely that the MachineInstruction the iterator
-  /// references has been changed.
-  virtual bool foldMemoryOperand(MachineBasicBlock::iterator &MI,
-                                 unsigned OpNum, int FrameIndex) const {
-    return false;
+  /// foldMemoryOperand - Attempt to fold a load or store of the
+  /// specified stack slot into the specified machine instruction for
+  /// the specified operand.  If this is possible, a new instruction
+  /// is returned with the specified operand folded, otherwise NULL is
+  /// returned. The client is responsible for removing the old
+  /// instruction and adding the new one in the instruction stream
+  virtual MachineInstr* foldMemoryOperand(MachineBasicBlock::iterator MI,
+                                          unsigned OpNum,
+                                          int FrameIndex) const {
+    return NULL;
   }
 
   /// getCallFrameSetup/DestroyOpcode - These methods return the opcode of the
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index d6cc357..7f6afc5 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -209,13 +209,15 @@
             for (unsigned i = 0; i < mi->getNumOperands(); ++i) {
                 MachineOperand& mop = mi->getOperand(i);
                 if (mop.isRegister() && mop.getReg() == li.reg) {
-                    MachineInstr* old = mi;
-                    if (mri_->foldMemoryOperand(mi, i, slot)) {
-                        lv_->instructionChanged(old, mi);
-                        vrm.virtFolded(li.reg, old, mi);
-                        mi2iMap_.erase(old);
-                        i2miMap_[index/InstrSlots::NUM] = mi;
-                        mi2iMap_[mi] = index;
+                    if (MachineInstr* fmi =
+                        mri_->foldMemoryOperand(mi, i, slot)) {
+                        lv_->instructionChanged(mi, fmi);
+                        vrm.virtFolded(li.reg, mi, fmi);
+                        mi2iMap_.erase(mi);
+                        i2miMap_[index/InstrSlots::NUM] = fmi;
+                        mi2iMap_[fmi] = index;
+                        MachineBasicBlock& mbb = *mi->getParent();
+                        mi = mbb.insert(mbb.erase(mi), fmi);
                         ++numFolded;
                         goto for_operand;
                     }
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index bd1e090..0b5fdc5 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -487,13 +487,12 @@
     assignVirtToPhysReg(VirtReg, PhysReg);
   } else {         // No registers available.
     // If we can fold this spill into this instruction, do so now.
-    MachineBasicBlock::iterator MII = MI;
-    if (RegInfo->foldMemoryOperand(MII, OpNum, FrameIndex)) {
+    if (MachineInstr* FMI = RegInfo->foldMemoryOperand(MI, OpNum, FrameIndex)){
       ++NumFolded;
       // Since we changed the address of MI, make sure to update live variables
       // to know that the new instruction has the properties of the old one.
-      LV->instructionChanged(MI, MII);
-      return MII;
+      LV->instructionChanged(MI, FMI);
+      return MBB.insert(MBB.erase(MI), FMI);
     }
 
     // It looks like we can't fold this virtual register load into this
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index d64b1a7..211cd6e 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -1,10 +1,10 @@
 //===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file was developed by the LLVM research group and is distributed under
 // the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
 //
 // This file contains the X86 implementation of the MRegisterInfo class.  This
@@ -132,181 +132,175 @@
 }
 
 
-bool X86RegisterInfo::foldMemoryOperand(MachineBasicBlock::iterator &MI,
-                                        unsigned i, int FrameIndex) const {
-  if (NoFusing) return false;
+MachineInstr* X86RegisterInfo::foldMemoryOperand(
+  MachineBasicBlock::iterator MI,
+  unsigned i,
+  int FrameIndex) const {
+  if (NoFusing) return NULL;
 
   /// FIXME: This should obviously be autogenerated by tablegen when patterns
   /// are available!
   MachineBasicBlock& MBB = *MI->getParent();
-  MachineInstr* NI = 0;
   if (i == 0) {
     switch(MI->getOpcode()) {
-    case X86::XCHG8rr: NI = MakeMRInst(X86::XCHG8mr ,FrameIndex, MI); break;
-    case X86::XCHG16rr:NI = MakeMRInst(X86::XCHG16mr,FrameIndex, MI); break;
-    case X86::XCHG32rr:NI = MakeMRInst(X86::XCHG32mr,FrameIndex, MI); break;
-    case X86::MOV8rr:  NI = MakeMRInst(X86::MOV8mr , FrameIndex, MI); break;
-    case X86::MOV16rr: NI = MakeMRInst(X86::MOV16mr, FrameIndex, MI); break;
-    case X86::MOV32rr: NI = MakeMRInst(X86::MOV32mr, FrameIndex, MI); break;
-    case X86::MOV8ri:  NI = MakeMIInst(X86::MOV8mi , FrameIndex, MI); break;
-    case X86::MOV16ri: NI = MakeMIInst(X86::MOV16mi, FrameIndex, MI); break;
-    case X86::MOV32ri: NI = MakeMIInst(X86::MOV32mi, FrameIndex, MI); break;
-    case X86::MUL8r:   NI = MakeMInst( X86::MUL8m ,  FrameIndex, MI); break;
-    case X86::MUL16r:  NI = MakeMInst( X86::MUL16m,  FrameIndex, MI); break;
-    case X86::MUL32r:  NI = MakeMInst( X86::MUL32m,  FrameIndex, MI); break;
-    case X86::DIV8r:   NI = MakeMInst( X86::DIV8m ,  FrameIndex, MI); break;
-    case X86::DIV16r:  NI = MakeMInst( X86::DIV16m,  FrameIndex, MI); break;
-    case X86::DIV32r:  NI = MakeMInst( X86::DIV32m,  FrameIndex, MI); break;
-    case X86::IDIV8r:  NI = MakeMInst( X86::IDIV8m , FrameIndex, MI); break;
-    case X86::IDIV16r: NI = MakeMInst( X86::IDIV16m, FrameIndex, MI); break;
-    case X86::IDIV32r: NI = MakeMInst( X86::IDIV32m, FrameIndex, MI); break;
-    case X86::NEG8r:   NI = MakeMInst( X86::NEG8m ,  FrameIndex, MI); break;
-    case X86::NEG16r:  NI = MakeMInst( X86::NEG16m,  FrameIndex, MI); break;
-    case X86::NEG32r:  NI = MakeMInst( X86::NEG32m,  FrameIndex, MI); break;
-    case X86::NOT8r:   NI = MakeMInst( X86::NOT8m ,  FrameIndex, MI); break;
-    case X86::NOT16r:  NI = MakeMInst( X86::NOT16m,  FrameIndex, MI); break;
-    case X86::NOT32r:  NI = MakeMInst( X86::NOT32m,  FrameIndex, MI); break;
-    case X86::INC8r:   NI = MakeMInst( X86::INC8m ,  FrameIndex, MI); break;
-    case X86::INC16r:  NI = MakeMInst( X86::INC16m,  FrameIndex, MI); break;
-    case X86::INC32r:  NI = MakeMInst( X86::INC32m,  FrameIndex, MI); break;
-    case X86::DEC8r:   NI = MakeMInst( X86::DEC8m ,  FrameIndex, MI); break;
-    case X86::DEC16r:  NI = MakeMInst( X86::DEC16m,  FrameIndex, MI); break;
-    case X86::DEC32r:  NI = MakeMInst( X86::DEC32m,  FrameIndex, MI); break;
-    case X86::ADD8rr:  NI = MakeMRInst(X86::ADD8mr , FrameIndex, MI); break;
-    case X86::ADD16rr: NI = MakeMRInst(X86::ADD16mr, FrameIndex, MI); break;
-    case X86::ADD32rr: NI = MakeMRInst(X86::ADD32mr, FrameIndex, MI); break;
-    case X86::ADC32rr: NI = MakeMRInst(X86::ADC32mr, FrameIndex, MI); break;
-    case X86::ADD8ri:  NI = MakeMIInst(X86::ADD8mi , FrameIndex, MI); break;
-    case X86::ADD16ri: NI = MakeMIInst(X86::ADD16mi, FrameIndex, MI); break;
-    case X86::ADD32ri: NI = MakeMIInst(X86::ADD32mi, FrameIndex, MI); break;
-    case X86::SUB8rr:  NI = MakeMRInst(X86::SUB8mr , FrameIndex, MI); break;
-    case X86::SUB16rr: NI = MakeMRInst(X86::SUB16mr, FrameIndex, MI); break;
-    case X86::SUB32rr: NI = MakeMRInst(X86::SUB32mr, FrameIndex, MI); break;
-    case X86::SBB32rr: NI = MakeMRInst(X86::SBB32mr, FrameIndex, MI); break;
-    case X86::SUB8ri:  NI = MakeMIInst(X86::SUB8mi , FrameIndex, MI); break;
-    case X86::SUB16ri: NI = MakeMIInst(X86::SUB16mi, FrameIndex, MI); break;
-    case X86::SUB32ri: NI = MakeMIInst(X86::SUB32mi, FrameIndex, MI); break;
-    case X86::AND8rr:  NI = MakeMRInst(X86::AND8mr , FrameIndex, MI); break;
-    case X86::AND16rr: NI = MakeMRInst(X86::AND16mr, FrameIndex, MI); break;
-    case X86::AND32rr: NI = MakeMRInst(X86::AND32mr, FrameIndex, MI); break;
-    case X86::AND8ri:  NI = MakeMIInst(X86::AND8mi , FrameIndex, MI); break;
-    case X86::AND16ri: NI = MakeMIInst(X86::AND16mi, FrameIndex, MI); break;
-    case X86::AND32ri: NI = MakeMIInst(X86::AND32mi, FrameIndex, MI); break;
-    case X86::OR8rr:   NI = MakeMRInst(X86::OR8mr ,  FrameIndex, MI); break;
-    case X86::OR16rr:  NI = MakeMRInst(X86::OR16mr,  FrameIndex, MI); break;
-    case X86::OR32rr:  NI = MakeMRInst(X86::OR32mr,  FrameIndex, MI); break;
-    case X86::OR8ri:   NI = MakeMIInst(X86::OR8mi ,  FrameIndex, MI); break;
-    case X86::OR16ri:  NI = MakeMIInst(X86::OR16mi,  FrameIndex, MI); break;
-    case X86::OR32ri:  NI = MakeMIInst(X86::OR32mi,  FrameIndex, MI); break;
-    case X86::XOR8rr:  NI = MakeMRInst(X86::XOR8mr , FrameIndex, MI); break;
-    case X86::XOR16rr: NI = MakeMRInst(X86::XOR16mr, FrameIndex, MI); break;
-    case X86::XOR32rr: NI = MakeMRInst(X86::XOR32mr, FrameIndex, MI); break;
-    case X86::XOR8ri:  NI = MakeMIInst(X86::XOR8mi , FrameIndex, MI); break;
-    case X86::XOR16ri: NI = MakeMIInst(X86::XOR16mi, FrameIndex, MI); break;
-    case X86::XOR32ri: NI = MakeMIInst(X86::XOR32mi, FrameIndex, MI); break;
-    case X86::SHL8rCL: NI = MakeMInst( X86::SHL8mCL ,FrameIndex, MI); break;
-    case X86::SHL16rCL:NI = MakeMInst( X86::SHL16mCL,FrameIndex, MI); break;
-    case X86::SHL32rCL:NI = MakeMInst( X86::SHL32mCL,FrameIndex, MI); break;
-    case X86::SHL8ri:  NI = MakeMIInst(X86::SHL8mi , FrameIndex, MI); break;
-    case X86::SHL16ri: NI = MakeMIInst(X86::SHL16mi, FrameIndex, MI); break;
-    case X86::SHL32ri: NI = MakeMIInst(X86::SHL32mi, FrameIndex, MI); break;
-    case X86::SHR8rCL: NI = MakeMInst( X86::SHR8mCL ,FrameIndex, MI); break;
-    case X86::SHR16rCL:NI = MakeMInst( X86::SHR16mCL,FrameIndex, MI); break;
-    case X86::SHR32rCL:NI = MakeMInst( X86::SHR32mCL,FrameIndex, MI); break;
-    case X86::SHR8ri:  NI = MakeMIInst(X86::SHR8mi , FrameIndex, MI); break;
-    case X86::SHR16ri: NI = MakeMIInst(X86::SHR16mi, FrameIndex, MI); break;
-    case X86::SHR32ri: NI = MakeMIInst(X86::SHR32mi, FrameIndex, MI); break;
-    case X86::SAR8rCL: NI = MakeMInst( X86::SAR8mCL ,FrameIndex, MI); break;
-    case X86::SAR16rCL:NI = MakeMInst( X86::SAR16mCL,FrameIndex, MI); break;
-    case X86::SAR32rCL:NI = MakeMInst( X86::SAR32mCL,FrameIndex, MI); break;
-    case X86::SAR8ri:  NI = MakeMIInst(X86::SAR8mi , FrameIndex, MI); break;
-    case X86::SAR16ri: NI = MakeMIInst(X86::SAR16mi, FrameIndex, MI); break;
-    case X86::SAR32ri: NI = MakeMIInst(X86::SAR32mi, FrameIndex, MI); break;
-    case X86::SHLD32rrCL:NI = MakeMRInst( X86::SHLD32mrCL,FrameIndex, MI);break;
-    case X86::SHLD32rri8:NI = MakeMRIInst(X86::SHLD32mri8,FrameIndex, MI);break;
-    case X86::SHRD32rrCL:NI = MakeMRInst( X86::SHRD32mrCL,FrameIndex, MI);break;
-    case X86::SHRD32rri8:NI = MakeMRIInst(X86::SHRD32mri8,FrameIndex, MI);break;
-    case X86::SETBr:   NI = MakeMInst( X86::SETBm,   FrameIndex, MI); break;
-    case X86::SETAEr:  NI = MakeMInst( X86::SETAEm,  FrameIndex, MI); break;
-    case X86::SETEr:   NI = MakeMInst( X86::SETEm,   FrameIndex, MI); break;
-    case X86::SETNEr:  NI = MakeMInst( X86::SETNEm,  FrameIndex, MI); break;
-    case X86::SETBEr:  NI = MakeMInst( X86::SETBEm,  FrameIndex, MI); break;
-    case X86::SETAr:   NI = MakeMInst( X86::SETAm,   FrameIndex, MI); break;
-    case X86::SETSr:   NI = MakeMInst( X86::SETSm,   FrameIndex, MI); break;
-    case X86::SETNSr:  NI = MakeMInst( X86::SETNSm,  FrameIndex, MI); break;
-    case X86::SETLr:   NI = MakeMInst( X86::SETLm,   FrameIndex, MI); break;
-    case X86::SETGEr:  NI = MakeMInst( X86::SETGEm,  FrameIndex, MI); break;
-    case X86::SETLEr:  NI = MakeMInst( X86::SETLEm,  FrameIndex, MI); break;
-    case X86::SETGr:   NI = MakeMInst( X86::SETGm,   FrameIndex, MI); break;
-    case X86::TEST8rr: NI = MakeMRInst(X86::TEST8mr ,FrameIndex, MI); break;
-    case X86::TEST16rr:NI = MakeMRInst(X86::TEST16mr,FrameIndex, MI); break;
-    case X86::TEST32rr:NI = MakeMRInst(X86::TEST32mr,FrameIndex, MI); break;
-    case X86::TEST8ri: NI = MakeMIInst(X86::TEST8mi ,FrameIndex, MI); break;
-    case X86::TEST16ri:NI = MakeMIInst(X86::TEST16mi,FrameIndex, MI); break;
-    case X86::TEST32ri:NI = MakeMIInst(X86::TEST32mi,FrameIndex, MI); break;
-    case X86::CMP8rr:  NI = MakeMRInst(X86::CMP8mr , FrameIndex, MI); break;
-    case X86::CMP16rr: NI = MakeMRInst(X86::CMP16mr, FrameIndex, MI); break;
-    case X86::CMP32rr: NI = MakeMRInst(X86::CMP32mr, FrameIndex, MI); break;
-    case X86::CMP8ri:  NI = MakeMIInst(X86::CMP8mi , FrameIndex, MI); break;
-    case X86::CMP16ri: NI = MakeMIInst(X86::CMP16mi, FrameIndex, MI); break;
-    case X86::CMP32ri: NI = MakeMIInst(X86::CMP32mi, FrameIndex, MI); break;
-    default: break; // Cannot fold
+    case X86::XCHG8rr:   return MakeMRInst(X86::XCHG8mr ,FrameIndex, MI);
+    case X86::XCHG16rr:  return MakeMRInst(X86::XCHG16mr,FrameIndex, MI);
+    case X86::XCHG32rr:  return MakeMRInst(X86::XCHG32mr,FrameIndex, MI);
+    case X86::MOV8rr:    return MakeMRInst(X86::MOV8mr , FrameIndex, MI);
+    case X86::MOV16rr:   return MakeMRInst(X86::MOV16mr, FrameIndex, MI);
+    case X86::MOV32rr:   return MakeMRInst(X86::MOV32mr, FrameIndex, MI);
+    case X86::MOV8ri:    return MakeMIInst(X86::MOV8mi , FrameIndex, MI);
+    case X86::MOV16ri:   return MakeMIInst(X86::MOV16mi, FrameIndex, MI);
+    case X86::MOV32ri:   return MakeMIInst(X86::MOV32mi, FrameIndex, MI);
+    case X86::MUL8r:     return MakeMInst( X86::MUL8m ,  FrameIndex, MI);
+    case X86::MUL16r:    return MakeMInst( X86::MUL16m,  FrameIndex, MI);
+    case X86::MUL32r:    return MakeMInst( X86::MUL32m,  FrameIndex, MI);
+    case X86::DIV8r:     return MakeMInst( X86::DIV8m ,  FrameIndex, MI);
+    case X86::DIV16r:    return MakeMInst( X86::DIV16m,  FrameIndex, MI);
+    case X86::DIV32r:    return MakeMInst( X86::DIV32m,  FrameIndex, MI);
+    case X86::IDIV8r:    return MakeMInst( X86::IDIV8m , FrameIndex, MI);
+    case X86::IDIV16r:   return MakeMInst( X86::IDIV16m, FrameIndex, MI);
+    case X86::IDIV32r:   return MakeMInst( X86::IDIV32m, FrameIndex, MI);
+    case X86::NEG8r:     return MakeMInst( X86::NEG8m ,  FrameIndex, MI);
+    case X86::NEG16r:    return MakeMInst( X86::NEG16m,  FrameIndex, MI);
+    case X86::NEG32r:    return MakeMInst( X86::NEG32m,  FrameIndex, MI);
+    case X86::NOT8r:     return MakeMInst( X86::NOT8m ,  FrameIndex, MI);
+    case X86::NOT16r:    return MakeMInst( X86::NOT16m,  FrameIndex, MI);
+    case X86::NOT32r:    return MakeMInst( X86::NOT32m,  FrameIndex, MI);
+    case X86::INC8r:     return MakeMInst( X86::INC8m ,  FrameIndex, MI);
+    case X86::INC16r:    return MakeMInst( X86::INC16m,  FrameIndex, MI);
+    case X86::INC32r:    return MakeMInst( X86::INC32m,  FrameIndex, MI);
+    case X86::DEC8r:     return MakeMInst( X86::DEC8m ,  FrameIndex, MI);
+    case X86::DEC16r:    return MakeMInst( X86::DEC16m,  FrameIndex, MI);
+    case X86::DEC32r:    return MakeMInst( X86::DEC32m,  FrameIndex, MI);
+    case X86::ADD8rr:    return MakeMRInst(X86::ADD8mr , FrameIndex, MI);
+    case X86::ADD16rr:   return MakeMRInst(X86::ADD16mr, FrameIndex, MI);
+    case X86::ADD32rr:   return MakeMRInst(X86::ADD32mr, FrameIndex, MI);
+    case X86::ADC32rr:   return MakeMRInst(X86::ADC32mr, FrameIndex, MI);
+    case X86::ADD8ri:    return MakeMIInst(X86::ADD8mi , FrameIndex, MI);
+    case X86::ADD16ri:   return MakeMIInst(X86::ADD16mi, FrameIndex, MI);
+    case X86::ADD32ri:   return MakeMIInst(X86::ADD32mi, FrameIndex, MI);
+    case X86::SUB8rr:    return MakeMRInst(X86::SUB8mr , FrameIndex, MI);
+    case X86::SUB16rr:   return MakeMRInst(X86::SUB16mr, FrameIndex, MI);
+    case X86::SUB32rr:   return MakeMRInst(X86::SUB32mr, FrameIndex, MI);
+    case X86::SBB32rr:   return MakeMRInst(X86::SBB32mr, FrameIndex, MI);
+    case X86::SUB8ri:    return MakeMIInst(X86::SUB8mi , FrameIndex, MI);
+    case X86::SUB16ri:   return MakeMIInst(X86::SUB16mi, FrameIndex, MI);
+    case X86::SUB32ri:   return MakeMIInst(X86::SUB32mi, FrameIndex, MI);
+    case X86::AND8rr:    return MakeMRInst(X86::AND8mr , FrameIndex, MI);
+    case X86::AND16rr:   return MakeMRInst(X86::AND16mr, FrameIndex, MI);
+    case X86::AND32rr:   return MakeMRInst(X86::AND32mr, FrameIndex, MI);
+    case X86::AND8ri:    return MakeMIInst(X86::AND8mi , FrameIndex, MI);
+    case X86::AND16ri:   return MakeMIInst(X86::AND16mi, FrameIndex, MI);
+    case X86::AND32ri:   return MakeMIInst(X86::AND32mi, FrameIndex, MI);
+    case X86::OR8rr:     return MakeMRInst(X86::OR8mr ,  FrameIndex, MI);
+    case X86::OR16rr:    return MakeMRInst(X86::OR16mr,  FrameIndex, MI);
+    case X86::OR32rr:    return MakeMRInst(X86::OR32mr,  FrameIndex, MI);
+    case X86::OR8ri:     return MakeMIInst(X86::OR8mi ,  FrameIndex, MI);
+    case X86::OR16ri:    return MakeMIInst(X86::OR16mi,  FrameIndex, MI);
+    case X86::OR32ri:    return MakeMIInst(X86::OR32mi,  FrameIndex, MI);
+    case X86::XOR8rr:    return MakeMRInst(X86::XOR8mr , FrameIndex, MI);
+    case X86::XOR16rr:   return MakeMRInst(X86::XOR16mr, FrameIndex, MI);
+    case X86::XOR32rr:   return MakeMRInst(X86::XOR32mr, FrameIndex, MI);
+    case X86::XOR8ri:    return MakeMIInst(X86::XOR8mi , FrameIndex, MI);
+    case X86::XOR16ri:   return MakeMIInst(X86::XOR16mi, FrameIndex, MI);
+    case X86::XOR32ri:   return MakeMIInst(X86::XOR32mi, FrameIndex, MI);
+    case X86::SHL8rCL:   return MakeMInst( X86::SHL8mCL ,FrameIndex, MI);
+    case X86::SHL16rCL:  return MakeMInst( X86::SHL16mCL,FrameIndex, MI);
+    case X86::SHL32rCL:  return MakeMInst( X86::SHL32mCL,FrameIndex, MI);
+    case X86::SHL8ri:    return MakeMIInst(X86::SHL8mi , FrameIndex, MI);
+    case X86::SHL16ri:   return MakeMIInst(X86::SHL16mi, FrameIndex, MI);
+    case X86::SHL32ri:   return MakeMIInst(X86::SHL32mi, FrameIndex, MI);
+    case X86::SHR8rCL:   return MakeMInst( X86::SHR8mCL ,FrameIndex, MI);
+    case X86::SHR16rCL:  return MakeMInst( X86::SHR16mCL,FrameIndex, MI);
+    case X86::SHR32rCL:  return MakeMInst( X86::SHR32mCL,FrameIndex, MI);
+    case X86::SHR8ri:    return MakeMIInst(X86::SHR8mi , FrameIndex, MI);
+    case X86::SHR16ri:   return MakeMIInst(X86::SHR16mi, FrameIndex, MI);
+    case X86::SHR32ri:   return MakeMIInst(X86::SHR32mi, FrameIndex, MI);
+    case X86::SAR8rCL:   return MakeMInst( X86::SAR8mCL ,FrameIndex, MI);
+    case X86::SAR16rCL:  return MakeMInst( X86::SAR16mCL,FrameIndex, MI);
+    case X86::SAR32rCL:  return MakeMInst( X86::SAR32mCL,FrameIndex, MI);
+    case X86::SAR8ri:    return MakeMIInst(X86::SAR8mi , FrameIndex, MI);
+    case X86::SAR16ri:   return MakeMIInst(X86::SAR16mi, FrameIndex, MI);
+    case X86::SAR32ri:   return MakeMIInst(X86::SAR32mi, FrameIndex, MI);
+    case X86::SHLD32rrCL:return MakeMRInst( X86::SHLD32mrCL,FrameIndex, MI);
+    case X86::SHLD32rri8:return MakeMRIInst(X86::SHLD32mri8,FrameIndex, MI);
+    case X86::SHRD32rrCL:return MakeMRInst( X86::SHRD32mrCL,FrameIndex, MI);
+    case X86::SHRD32rri8:return MakeMRIInst(X86::SHRD32mri8,FrameIndex, MI);
+    case X86::SETBr:     return MakeMInst( X86::SETBm,   FrameIndex, MI);
+    case X86::SETAEr:    return MakeMInst( X86::SETAEm,  FrameIndex, MI);
+    case X86::SETEr:     return MakeMInst( X86::SETEm,   FrameIndex, MI);
+    case X86::SETNEr:    return MakeMInst( X86::SETNEm,  FrameIndex, MI);
+    case X86::SETBEr:    return MakeMInst( X86::SETBEm,  FrameIndex, MI);
+    case X86::SETAr:     return MakeMInst( X86::SETAm,   FrameIndex, MI);
+    case X86::SETSr:     return MakeMInst( X86::SETSm,   FrameIndex, MI);
+    case X86::SETNSr:    return MakeMInst( X86::SETNSm,  FrameIndex, MI);
+    case X86::SETLr:     return MakeMInst( X86::SETLm,   FrameIndex, MI);
+    case X86::SETGEr:    return MakeMInst( X86::SETGEm,  FrameIndex, MI);
+    case X86::SETLEr:    return MakeMInst( X86::SETLEm,  FrameIndex, MI);
+    case X86::SETGr:     return MakeMInst( X86::SETGm,   FrameIndex, MI);
+    case X86::TEST8rr:   return MakeMRInst(X86::TEST8mr ,FrameIndex, MI);
+    case X86::TEST16rr:  return MakeMRInst(X86::TEST16mr,FrameIndex, MI);
+    case X86::TEST32rr:  return MakeMRInst(X86::TEST32mr,FrameIndex, MI);
+    case X86::TEST8ri:   return MakeMIInst(X86::TEST8mi ,FrameIndex, MI);
+    case X86::TEST16ri:  return MakeMIInst(X86::TEST16mi,FrameIndex, MI);
+    case X86::TEST32ri:  return MakeMIInst(X86::TEST32mi,FrameIndex, MI);
+    case X86::CMP8rr:    return MakeMRInst(X86::CMP8mr , FrameIndex, MI);
+    case X86::CMP16rr:   return MakeMRInst(X86::CMP16mr, FrameIndex, MI);
+    case X86::CMP32rr:   return MakeMRInst(X86::CMP32mr, FrameIndex, MI);
+    case X86::CMP8ri:    return MakeMIInst(X86::CMP8mi , FrameIndex, MI);
+    case X86::CMP16ri:   return MakeMIInst(X86::CMP16mi, FrameIndex, MI);
+    case X86::CMP32ri:   return MakeMIInst(X86::CMP32mi, FrameIndex, MI);
     }
   } else if (i == 1) {
     switch(MI->getOpcode()) {
-    case X86::XCHG8rr: NI = MakeRMInst(X86::XCHG8rm ,FrameIndex, MI); break;
-    case X86::XCHG16rr:NI = MakeRMInst(X86::XCHG16rm,FrameIndex, MI); break;
-    case X86::XCHG32rr:NI = MakeRMInst(X86::XCHG32rm,FrameIndex, MI); break;
-    case X86::MOV8rr:  NI = MakeRMInst(X86::MOV8rm , FrameIndex, MI); break;
-    case X86::MOV16rr: NI = MakeRMInst(X86::MOV16rm, FrameIndex, MI); break;
-    case X86::MOV32rr: NI = MakeRMInst(X86::MOV32rm, FrameIndex, MI); break;
-    case X86::CMOVE16rr:  NI = MakeRMInst(X86::CMOVE16rm , FrameIndex, MI); break;
-    case X86::CMOVNE32rr: NI = MakeRMInst(X86::CMOVNE32rm, FrameIndex, MI); break;
-    case X86::CMOVS32rr:  NI = MakeRMInst(X86::CMOVS32rm , FrameIndex, MI); break;
-    case X86::ADD8rr:  NI = MakeRMInst(X86::ADD8rm , FrameIndex, MI); break;
-    case X86::ADD16rr: NI = MakeRMInst(X86::ADD16rm, FrameIndex, MI); break;
-    case X86::ADD32rr: NI = MakeRMInst(X86::ADD32rm, FrameIndex, MI); break;
-    case X86::ADC32rr: NI = MakeRMInst(X86::ADC32rm, FrameIndex, MI); break;
-    case X86::SUB8rr:  NI = MakeRMInst(X86::SUB8rm , FrameIndex, MI); break;
-    case X86::SUB16rr: NI = MakeRMInst(X86::SUB16rm, FrameIndex, MI); break;
-    case X86::SUB32rr: NI = MakeRMInst(X86::SUB32rm, FrameIndex, MI); break;
-    case X86::SBB32rr: NI = MakeRMInst(X86::SBB32rm, FrameIndex, MI); break;
-    case X86::AND8rr:  NI = MakeRMInst(X86::AND8rm , FrameIndex, MI); break;
-    case X86::AND16rr: NI = MakeRMInst(X86::AND16rm, FrameIndex, MI); break;
-    case X86::AND32rr: NI = MakeRMInst(X86::AND32rm, FrameIndex, MI); break;
-    case X86::OR8rr:   NI = MakeRMInst(X86::OR8rm ,  FrameIndex, MI); break;
-    case X86::OR16rr:  NI = MakeRMInst(X86::OR16rm,  FrameIndex, MI); break;
-    case X86::OR32rr:  NI = MakeRMInst(X86::OR32rm,  FrameIndex, MI); break;
-    case X86::XOR8rr:  NI = MakeRMInst(X86::XOR8rm , FrameIndex, MI); break;
-    case X86::XOR16rr: NI = MakeRMInst(X86::XOR16rm, FrameIndex, MI); break;
-    case X86::XOR32rr: NI = MakeRMInst(X86::XOR32rm, FrameIndex, MI); break;
-    case X86::TEST8rr: NI = MakeRMInst(X86::TEST8rm ,FrameIndex, MI); break;
-    case X86::TEST16rr:NI = MakeRMInst(X86::TEST16rm,FrameIndex, MI); break;
-    case X86::TEST32rr:NI = MakeRMInst(X86::TEST32rm,FrameIndex, MI); break;
-    case X86::IMUL16rr:NI = MakeRMInst(X86::IMUL16rm,FrameIndex, MI); break;
-    case X86::IMUL32rr:NI = MakeRMInst(X86::IMUL32rm,FrameIndex, MI); break;
-    case X86::IMUL16rri: NI = MakeRMIInst(X86::IMUL16rmi, FrameIndex, MI);break;
-    case X86::IMUL32rri: NI = MakeRMIInst(X86::IMUL32rmi, FrameIndex, MI);break;
-    case X86::CMP8rr:  NI = MakeRMInst(X86::CMP8rm , FrameIndex, MI); break;
-    case X86::CMP16rr: NI = MakeRMInst(X86::CMP16rm, FrameIndex, MI); break;
-    case X86::CMP32rr: NI = MakeRMInst(X86::CMP32rm, FrameIndex, MI); break;
-    case X86::MOVSX16rr8: NI = MakeRMInst(X86::MOVSX16rm8 , FrameIndex, MI); break;
-    case X86::MOVSX32rr8: NI = MakeRMInst(X86::MOVSX32rm8, FrameIndex, MI); break;
-    case X86::MOVSX32rr16:NI = MakeRMInst(X86::MOVSX32rm16, FrameIndex, MI); break;
-    case X86::MOVZX16rr8: NI = MakeRMInst(X86::MOVZX16rm8 , FrameIndex, MI); break;
-    case X86::MOVZX32rr8: NI = MakeRMInst(X86::MOVZX32rm8, FrameIndex, MI); break;
-    case X86::MOVZX32rr16:NI = MakeRMInst(X86::MOVZX32rm16, FrameIndex, MI); break;
-    default: break;
+    case X86::XCHG8rr:   return MakeRMInst(X86::XCHG8rm ,FrameIndex, MI);
+    case X86::XCHG16rr:  return MakeRMInst(X86::XCHG16rm,FrameIndex, MI);
+    case X86::XCHG32rr:  return MakeRMInst(X86::XCHG32rm,FrameIndex, MI);
+    case X86::MOV8rr:    return MakeRMInst(X86::MOV8rm , FrameIndex, MI);
+    case X86::MOV16rr:   return MakeRMInst(X86::MOV16rm, FrameIndex, MI);
+    case X86::MOV32rr:   return MakeRMInst(X86::MOV32rm, FrameIndex, MI);
+    case X86::CMOVE16rr: return MakeRMInst(X86::CMOVE16rm , FrameIndex, MI);
+    case X86::CMOVNE32rr:return MakeRMInst(X86::CMOVNE32rm, FrameIndex, MI);
+    case X86::CMOVS32rr: return MakeRMInst(X86::CMOVS32rm , FrameIndex, MI);
+    case X86::ADD8rr:    return MakeRMInst(X86::ADD8rm , FrameIndex, MI);
+    case X86::ADD16rr:   return MakeRMInst(X86::ADD16rm, FrameIndex, MI);
+    case X86::ADD32rr:   return MakeRMInst(X86::ADD32rm, FrameIndex, MI);
+    case X86::ADC32rr:   return MakeRMInst(X86::ADC32rm, FrameIndex, MI);
+    case X86::SUB8rr:    return MakeRMInst(X86::SUB8rm , FrameIndex, MI);
+    case X86::SUB16rr:   return MakeRMInst(X86::SUB16rm, FrameIndex, MI);
+    case X86::SUB32rr:   return MakeRMInst(X86::SUB32rm, FrameIndex, MI);
+    case X86::SBB32rr:   return MakeRMInst(X86::SBB32rm, FrameIndex, MI);
+    case X86::AND8rr:    return MakeRMInst(X86::AND8rm , FrameIndex, MI);
+    case X86::AND16rr:   return MakeRMInst(X86::AND16rm, FrameIndex, MI);
+    case X86::AND32rr:   return MakeRMInst(X86::AND32rm, FrameIndex, MI);
+    case X86::OR8rr:     return MakeRMInst(X86::OR8rm ,  FrameIndex, MI);
+    case X86::OR16rr:    return MakeRMInst(X86::OR16rm,  FrameIndex, MI);
+    case X86::OR32rr:    return MakeRMInst(X86::OR32rm,  FrameIndex, MI);
+    case X86::XOR8rr:    return MakeRMInst(X86::XOR8rm , FrameIndex, MI);
+    case X86::XOR16rr:   return MakeRMInst(X86::XOR16rm, FrameIndex, MI);
+    case X86::XOR32rr:   return MakeRMInst(X86::XOR32rm, FrameIndex, MI);
+    case X86::TEST8rr:   return MakeRMInst(X86::TEST8rm ,FrameIndex, MI);
+    case X86::TEST16rr:  return MakeRMInst(X86::TEST16rm,FrameIndex, MI);
+    case X86::TEST32rr:  return MakeRMInst(X86::TEST32rm,FrameIndex, MI);
+    case X86::IMUL16rr:  return MakeRMInst(X86::IMUL16rm,FrameIndex, MI);
+    case X86::IMUL32rr:  return MakeRMInst(X86::IMUL32rm,FrameIndex, MI);
+    case X86::IMUL16rri: return MakeRMIInst(X86::IMUL16rmi, FrameIndex, MI);
+    case X86::IMUL32rri: return MakeRMIInst(X86::IMUL32rmi, FrameIndex, MI);
+    case X86::CMP8rr:    return MakeRMInst(X86::CMP8rm , FrameIndex, MI);
+    case X86::CMP16rr:   return MakeRMInst(X86::CMP16rm, FrameIndex, MI);
+    case X86::CMP32rr:   return MakeRMInst(X86::CMP32rm, FrameIndex, MI);
+    case X86::MOVSX16rr8:return MakeRMInst(X86::MOVSX16rm8 , FrameIndex, MI);
+    case X86::MOVSX32rr8:return MakeRMInst(X86::MOVSX32rm8, FrameIndex, MI);
+    case X86::MOVSX32rr16:return MakeRMInst(X86::MOVSX32rm16, FrameIndex, MI);
+    case X86::MOVZX16rr8:return MakeRMInst(X86::MOVZX16rm8 , FrameIndex, MI);
+    case X86::MOVZX32rr8:  return MakeRMInst(X86::MOVZX32rm8, FrameIndex, MI);
+    case X86::MOVZX32rr16:return MakeRMInst(X86::MOVZX32rm16, FrameIndex, MI);
     }
   }
-  if (NI) {
-    MI = MBB.insert(MBB.erase(MI), NI);
-    return true;
-  } else {
-    if (PrintFailedFusing)
-      std::cerr << "We failed to fuse: " << *MI;
-    return false;
-  }
+  if (PrintFailedFusing)
+    std::cerr << "We failed to fuse: " << *MI;
+  return NULL;
 }
 
 //===----------------------------------------------------------------------===//
@@ -431,7 +425,7 @@
       // eliminates the need for add/sub ESP brackets around call sites.
       //
       NumBytes += MFI->getMaxCallFrameSize();
-      
+
       // Round the size to a multiple of the alignment (don't forget the 4 byte
       // offset though).
       unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
@@ -462,7 +456,7 @@
     // Get the offset of the stack slot for the EBP register... which is
     // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
     int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
-    
+
     // mov ESP, EBP
     MI = BuildMI(X86::MOV32rr, 1,X86::ESP).addReg(X86::EBP);
     MBB.insert(MBBI, MI);
@@ -498,7 +492,7 @@
   case Type::IntTyID:
   case Type::UIntTyID:
   case Type::PointerTyID: return &R32Instance;
-    
+
   case Type::FloatTyID:
   case Type::DoubleTyID: return &RFPInstance;
   }
diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h
index 5d843ab..3fd6ebe 100644
--- a/lib/Target/X86/X86RegisterInfo.h
+++ b/lib/Target/X86/X86RegisterInfo.h
@@ -48,8 +48,9 @@
   /// folding and return true, otherwise it should return false.  If it folds
   /// the instruction, it is likely that the MachineInstruction the iterator
   /// references has been changed.
-  virtual bool foldMemoryOperand(MachineBasicBlock::iterator &MI,unsigned OpNum,
-                                 int FrameIndex) const;
+  virtual MachineInstr* foldMemoryOperand(MachineBasicBlock::iterator MI,
+                                          unsigned OpNum,
+                                          int FrameIndex) const;
 
 
   void eliminateCallFramePseudoInstr(MachineFunction &MF,