Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/ARM/ldr_frame.ll b/test/CodeGen/ARM/ldr_frame.ll
index a3abdb6..f071b89 100644
--- a/test/CodeGen/ARM/ldr_frame.ll
+++ b/test/CodeGen/ARM/ldr_frame.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm | not grep mov
+; RUN: llc < %s -march=arm -mattr=+v4t | not grep mov
 
 define i32 @f1() {
 	%buf = alloca [32 x i32], align 4