commit | 3aa92e4e0047a2d325ffaf201ae6d1feb83fde15 | [log] [tgz] |
---|---|---|
author | Andrew Lenharth <andrewl@lenharth.org> | Wed May 17 19:24:31 2006 +0000 |
committer | Andrew Lenharth <andrewl@lenharth.org> | Wed May 17 19:24:31 2006 +0000 |
tree | d8bbf8c23e51bd5fb662bc113a3a7e8cf3111e93 | |
parent | 1a93f1c0ea90695c9548a578ff5dfb5905ce15d0 [diff] [blame] |
Added sanity check for obviously bogus immediates git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28359 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp index 8c597e4..7b446a4 100644 --- a/lib/Target/Alpha/AlphaAsmPrinter.cpp +++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -82,6 +82,7 @@ O << TM.getRegisterInfo()->get(MO.getReg()).Name; } else if (MO.isImmediate()) { O << MO.getImmedValue(); + assert(MO.getImmedValue() < (1 << 30)); } else { printOp(MO); }