commit | 3ce23d3d87d1ca437acb65ac01fac1c486507280 | [log] [tgz] |
---|---|---|
author | Jim Grosbach <grosbach@apple.com> | Thu Aug 18 16:08:39 2011 +0000 |
committer | Jim Grosbach <grosbach@apple.com> | Thu Aug 18 16:08:39 2011 +0000 |
tree | 3cc0257851fcc2119de57e6574e094d44c55fd75 | |
parent | c4dcf323cc63e82fc0c3d9413ff074eff303c449 [diff] [blame] |
Add missing 'break'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137941 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index f89968f..44c7a0a 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3039,6 +3039,7 @@ // If the conditional is AL, we really want tB. if (Inst.getOperand(1).getImm() == ARMCC::AL) Inst.setOpcode(ARM::tB); + break; } }