Don't hoist or sink instructions with physreg uses if the physreg is
allocatable. Even if it doesn't appear to have any defs, it may latter
on after register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82834 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp
index 8123d99..61678f1 100644
--- a/lib/CodeGen/MachineLICM.cpp
+++ b/lib/CodeGen/MachineLICM.cpp
@@ -44,6 +44,7 @@
const TargetMachine *TM;
const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
+ BitVector AllocatableSet;
// Various analyses that we use...
MachineLoopInfo *LI; // Current MachineLoopInfo
@@ -138,6 +139,7 @@
TII = TM->getInstrInfo();
TRI = TM->getRegisterInfo();
RegInfo = &MF.getRegInfo();
+ AllocatableSet = TRI->getAllocatableSet(MF);
// Get our Loop information...
LI = &getAnalysis<MachineLoopInfo>();
@@ -261,13 +263,20 @@
// we can move it, but only if the def is dead.
if (MO.isUse()) {
// If the physreg has no defs anywhere, it's just an ambient register
- // and we can freely move its uses.
+ // and we can freely move its uses. Alternatively, if it's allocatable,
+ // it could get allocated to something with a def during allocation.
if (!RegInfo->def_empty(Reg))
return false;
+ if (AllocatableSet.test(Reg))
+ return false;
// Check for a def among the register's aliases too.
- for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
- if (!RegInfo->def_empty(*Alias))
+ for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) {
+ unsigned AliasReg = *Alias;
+ if (!RegInfo->def_empty(AliasReg))
return false;
+ if (AllocatableSet.test(AliasReg))
+ return false;
+ }
// Otherwise it's safe to move.
continue;
} else if (!MO.isDead()) {