ARM assembly parsing and encoding for UMULL.
Fix parsing of the 's' suffix for the mnemonic. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136277 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 6af5281..8e692f3 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2360,7 +2360,7 @@
// predicated but do have a carry-set and so weren't caught above.
if (Mnemonic != "adcs" && Mnemonic != "bics" && Mnemonic != "movs" &&
Mnemonic != "muls" && Mnemonic != "smlals" && Mnemonic != "smulls" &&
- Mnemonic != "umlals") {
+ Mnemonic != "umlals" && Mnemonic != "umulls") {
unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2))
.Case("eq", ARMCC::EQ)
.Case("ne", ARMCC::NE)
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index f09bfd9..01038e3 100644
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -2081,3 +2081,17 @@
@ CHECK: umlalgt r6, r1, r2, r6 @ encoding: [0x92,0x66,0xa1,0xc0]
@ CHECK: umlals r2, r9, r2, r3 @ encoding: [0x92,0x23,0xb9,0xe0]
@ CHECK: umlalseq r3, r5, r1, r2 @ encoding: [0x91,0x32,0xb5,0x00]
+
+
+@------------------------------------------------------------------------------
+@ UMULL
+@------------------------------------------------------------------------------
+ umull r2, r4, r6, r8
+ umullgt r6, r1, r2, r6
+ umulls r2, r9, r2, r3
+ umullseq r3, r5, r1, r2
+
+@ CHECK: umull r2, r4, r6, r8 @ encoding: [0x96,0x28,0x84,0xe0]
+@ CHECK: umullgt r6, r1, r2, r6 @ encoding: [0x92,0x66,0x81,0xc0]
+@ CHECK: umulls r2, r9, r2, r3 @ encoding: [0x92,0x23,0x99,0xe0]
+@ CHECK: umullseq r3, r5, r1, r2 @ encoding: [0x91,0x32,0x95,0x00]